Lines Matching +full:li +full:-

44 .Bl -tag -width "Li PMC_CLASS_IAP"
45 .It Li PMC_CLASS_IAF
46 Fixed-function counters that count only one hardware event per counter.
47 .It Li PMC_CLASS_IAP
58 .%B "IA-32 Intel(R) Architecture Software Developer's Manual"
60 .%N "Order Number 253669-027US"
69 .Bl -column "PMC_CAP_INTERRUPT" "Support"
86 .Bl -tag -width indent
87 .It Li any
89 .It Li cmask= Ns Ar value
93 .It Li edge
94 Configure the PMC to count the number of de-asserted to asserted
99 .It Li inv
101 .Dq Li cmask
104 .Dq Li cmask
106 .It Li os
109 .It Li usr
115 .Dq Li os
117 .Dq Li usr
120 Events that require core-specificity to be specified use a
122 .Dq Li core= Ns Ar core ,
126 .Bl -tag -width indent
127 .It Li all
129 .It Li this
134 .Dq Li this .
138 .Dq Li agent= Ns agent ,
142 .Bl -tag -width indent
143 .It Li this
145 .It Li any
150 .Dq Li this .
154 .Dq Li prefetch= Ns Ar prefetch ,
158 .Bl -tag -width "exclude"
159 .It Li both
161 .It Li only
163 .It Li exclude
168 .Dq Li both .
172 .Dq Li cachestate= Ns Ar state ,
176 .Bl -tag -width indent
177 .It Li e
179 .It Li i
181 .It Li m
183 .It Li s
188 .Dq Li eims .
192 .Dq Li snoopresponse= Ns Ar response ,
198 .Bl -tag -width indent
199 .It Li clean
201 .It Li hit
203 .It Li hitm
210 .Dq Li snooptype= Ns Ar type ,
214 .Bl -tag -width indent
215 .It Li cmp2i
217 .It Li cmp2s
224 .Bl -tag -width indent
225 .It Li BACLEARS
228 .It Li BOGUS_BR
232 .It Li BR_BAC_MISSP_EXEC
236 .It Li BR_CALL_MISSP_EXEC
241 .It Li BR_CALL_EXEC
246 .It Li BR_CND_EXEC
249 .It Li BR_CND_MISSP_EXEC
252 .It Li BR_IND_CALL_EXEC
257 .It Li BR_IND_EXEC
260 .It Li BR_IND_MISSP_EXEC
263 .It Li BR_INST_DECODED
266 .It Li BR_INST_EXEC
269 .It Li BR_INST_RETIRED.ANY
274 .It Li BR_INST_RETIRED.ANY1
277 .It Li BR_INST_RETIRED.MISPRED
282 .It Li BR_INST_RETIRED.MISPRED_NOT_TAKEN
286 .It Li BR_INST_RETIRED.MISPRED_TAKEN
289 .It Li BR_INST_RETIRED.PRED_NOT_TAKEN
293 .It Li BR_INST_RETIRED.PRED_TAKEN
297 .It Li BR_INST_RETIRED.TAKEN
300 .It Li BR_MISSP_EXEC
303 .It Li BR_RET_MISSP_EXEC
308 .It Li BR_RET_BAC_MISSP_EXEC
313 .It Li BR_RET_EXEC
318 .It Li BR_TKN_BUBBLE_1
321 .It Li BR_TKN_BUBBLE_2
324 .It Li BUSQ_EMPTY Op ,core= Ns Ar core
328 .It Li BUS_BNR_DRV Op ,agent= Ns Ar agent
331 This event is thread-independent.
332 .It Li BUS_DATA_RCV Op ,core= Ns Ar core
335 This event is thread-independent.
336 .It Li BUS_DRDY_CLOCKS Op ,agent= Ns Ar agent
340 This event is thread-independent.
341 .It Li BUS_HIT_DRV Op ,agent= Ns Ar agent
346 This event is thread-independent.
347 .It Li BUS_HITM_DRV Op ,agent= Ns Ar agent
352 This event is thread-independent.
353 .It Li BUS_IO_WAIT Op ,core= Ns Ar core
357 .It Li BUS_LOCK_CLOCKS Xo
366 .It Li BUS_REQUEST_OUTSTANDING Xo
374 .It Li BUS_TRANS_P Xo
380 .It Li BUS_TRANS_IFETCH Xo
386 .It Li BUS_TRANS_INVAL Xo
392 .It Li BUS_TRANS_PWR Xo
398 .It Li BUS_TRANS_DEF Xo
404 .It Li BUS_TRANS_BURST Xo
410 .It Li BUS_TRANS_MEM Xo
416 .It Li BUS_TRANS_ANY Xo
422 .It Li BUS_TRANS_BRD Xo
428 .It Li BUS_TRANS_IO Xo
438 .It Li BUS_TRANS_RFO Xo
444 .It Li BUS_TRANS_WB Xo
449 The number explicit write-back bus transactions due to dirty line
451 .It Li CMP_SNOOP Xo
458 .It Li CPU_CLK_UNHALTED.BUS
463 .It Li CPU_CLK_UNHALTED.CORE_P
468 .It Li CPU_CLK_UNHALTED.NO_OTHER
472 .It Li CYCLES_DIV_BUSY
475 .It Li CYCLES_INT_MASKED.CYCLES_INT_MASKED
478 .It Li CYCLES_INT_MASKED.CYCLES_INT_PENDING_AND_MASKED
482 .It Li CYCLES_L1I_MEM_STALLED
485 .It Li DATA_TLB_MISSES.DTLB_MISS
488 .It Li DATA_TLB_MISSES.DTLB_MISS_LD
491 .It Li DATA_TLB_MISSES.DTLB_MISS_ST
494 .It Li DATA_TLB_MISSES.UTLB_MISS_LD
497 .It Li DELAYED_BYPASS.FP
501 .It Li DELAYED_BYPASS.LOAD
504 .It Li DELAYED_BYPASS.SIMD
507 was generated by a non-SIMD execution unit.
508 .It Li DIV
512 .It Li DIV.AR
515 .It Li DIV.S
518 .It Li DTLB_MISSES.ANY
522 .It Li DTLB_MISSES.L0_MISS_LD
525 .It Li DTLB_MISSES.MISS_LD
528 .It Li DTLB_MISSES.MISS_ST
531 .It Li EIST_TRANS
534 .It Li ESP.ADDITIONS
539 .It Li ESP.SYNCH
549 .It Li EXT_SNOOP Xo
555 .It Li FP_ASSIST
559 .It Li FP_ASSIST.AR
563 .It Li FP_COMP_OPS_EXE
565 The number of floating point computational micro-ops executed.
567 .It Li FP_MMX_TRANS_TO_FP
571 .It Li FP_MMX_TRANS_TO_MMX
575 .It Li HW_INT_RCV
578 .It Li ICACHE.ACCESSES
581 .It Li ICACHE.MISSES
584 .It Li IDLE_DURING_DIV
589 .It Li ILD_STALL
593 .It Li INST_QUEUE.FULL
596 .It Li INST_RETIRED.ANY_P
601 .It Li INST_RETIRED.LOADS
604 .It Li INST_RETIRED.OTHER
608 .It Li INST_RETIRED.STORES
611 .It Li ITLB.FLUSH
614 .It Li ITLB.LARGE_MISS
618 .It Li ITLB.MISSES
622 .It Li ITLB.SMALL_MISS
625 .It Li ITLB_MISS_RETIRED
629 .It Li L1D_ALL_REF
633 .It Li L1D_ALL_CACHE_REF
636 .It Li L1D_CACHE_LOCK Op ,cachestate= Ns Ar state
639 .It Li L1D_CACHE_LOCK_DURATION
643 .It Li L1D_CACHE.LD
646 .It Li L1D_CACHE.ST
649 .It Li L1D_M_EVICT
652 .It Li L1D_M_REPL
655 .It Li L1D_PEND_MISS
658 .It Li L1D_PREFETCH.REQUESTS
662 .It Li L1D_REPL
665 .It Li L1D_SPLIT.LOADS
668 .It Li L1D_SPLIT.STORES
671 .It Li L1I_MISSES
674 .It Li L1I_READS
677 .It Li L2_ADS Op ,core= Ns core
680 .It Li L2_DBUS_BUSY_RD Op ,core= Ns core
684 .It Li L2_IFETCH Xo
691 .It Li L2_LD Xo
699 .It Li L2_LINES_IN Xo
705 .It Li L2_LINES_OUT Xo
711 .It Li L2_LOCK Xo
718 .It Li L2_M_LINES_IN Op ,core= Ns Ar core
721 .It Li L2_M_LINES_OUT Xo
727 .It Li L2_NO_REQ Op ,core= Ns Ar core
731 .It Li L2_REJECT_BUSQ Xo
738 .It Li L2_RQSTS Xo
745 .It Li L2_RQSTS.SELF.DEMAND.I_STATE
751 .It Li L2_RQSTS.SELF.DEMAND.MESI
755 .It Li L2_ST Xo
762 .It Li LOAD_BLOCK.L1D
765 .It Li LOAD_BLOCK.OVERLAP_STORE
769 .It Li LOAD_BLOCK.STA
773 .It Li LOAD_BLOCK.STD
777 .It Li LOAD_BLOCK.UNTIL_RETIRE
780 .It Li LOAD_HIT_PRE
784 .It Li MACHINE_CLEARS.SMC
787 .It Li MACHINE_NUKES.MEM_ORDER
791 .It Li MACRO_INSTS.ALL_DECODED
794 .It Li MACRO_INSTS.CISC_DECODED
797 .It Li MEMORY_DISAMBIGUATION.RESET
801 .It Li MEMORY_DISAMBIGUATION.SUCCESS
804 .It Li MEM_LOAD_RETIRED.DTLB_MISS
807 .It Li MEM_LOAD_RETIRED.L2_MISS
810 .It Li MEM_LOAD_RETIRED.L2_HIT
813 .It Li MEM_LOAD_RETIRED.L2_LINE_MISS
817 .It Li MUL
821 .It Li MUL.AR
824 .It Li MUL.S
827 .It Li PAGE_WALKS.WALKS
830 .It Li PAGE_WALKS.CYCLES
835 .It Li PREF_RQSTS_DN
839 .It Li PREF_RQSTS_UP
843 .It Li PREFETCH.PREFETCHNTA
848 .It Li PREFETCH.PREFETCHT0
853 .It Li PREFETCH.SW_L2
860 .It Li RAT_STALLS.ANY
868 .It Li RAT_STALLS.FLAGS
872 .It Li RAT_STALLS.FPSW
875 .It Li RAT_STALLS.PARTIAL_CYCLES
879 .It Li RAT_STALLS.ROB_READ_PORT
882 .It Li RESOURCE_STALLS.ANY
886 .It Li RESOURCE_STALLS.BR_MISS_CLEAR
889 .It Li RESOURCE_STALLS.FPCW
893 .It Li RESOURCE_STALLS.LD_ST
897 .It Li RESOURCE_STALLS.ROB_FULL
900 .It Li RESOURCE_STALLS.RS_FULL
903 .It Li RS_UOPS_DISPATCHED
905 The number of micro-ops dispatched for execution.
906 .It Li RS_UOPS_DISPATCHED.PORT0
908 The number of cycles micro-ops were dispatched for execution on port
910 .It Li RS_UOPS_DISPATCHED.PORT1
912 The number of cycles micro-ops were dispatched for execution on port
914 .It Li RS_UOPS_DISPATCHED.PORT2
916 The number of cycles micro-ops were dispatched for execution on port
918 .It Li RS_UOPS_DISPATCHED.PORT3
920 The number of cycles micro-ops were dispatched for execution on port
922 .It Li RS_UOPS_DISPATCHED.PORT4
924 The number of cycles micro-ops were dispatched for execution on port
926 .It Li RS_UOPS_DISPATCHED.PORT5
928 The number of cycles micro-ops were dispatched for execution on port
930 .It Li SB_DRAIN_CYCLES
933 .It Li SEGMENT_REG_LOADS.ANY
936 .It Li SEG_REG_RENAMES.ANY
939 .It Li SEG_REG_RENAMES.DS
944 .It Li SEG_REG_RENAMES.ES
949 .It Li SEG_REG_RENAMES.FS
954 .It Li SEG_REG_RENAMES.GS
959 .It Li SEG_RENAME_STALLS.ANY
963 .It Li SEG_RENAME_STALLS.DS
968 .It Li SEG_RENAME_STALLS.ES
973 .It Li SEG_RENAME_STALLS.FS
978 .It Li SEG_RENAME_STALLS.GS
983 .It Li SIMD_ASSIST
986 .It Li SIMD_COMP_INST_RETIRED.PACKED_DOUBLE
990 .It Li SIMD_COMP_INST_RETIRED.PACKED_SINGLE
994 .It Li SIMD_COMP_INST_RETIRED.SCALAR_DOUBLE
998 .It Li SIMD_COMP_INST_RETIRED.SCALAR_SINGLE
1002 .It Li SIMD_INSTR_RETIRED
1005 .It Li SIMD_INST_RETIRED.ANY
1008 .It Li SIMD_INST_RETIRED.PACKED_DOUBLE
1011 .It Li SIMD_INST_RETIRED.PACKED_SINGLE
1014 .It Li SIMD_INST_RETIRED.SCALAR_DOUBLE
1017 .It Li SIMD_INST_RETIRED.SCALAR_SINGLE
1020 .It Li SIMD_INST_RETIRED.VECTOR
1023 .It Li SIMD_SAT_INSTR_RETIRED
1026 .It Li SIMD_SAT_UOP_EXEC.AR
1028 The number of SIMD saturated arithmetic micro-ops retired.
1029 .It Li SIMD_SAT_UOP_EXEC.S
1031 The number of SIMD saturated arithmetic micro-ops executed.
1032 .It Li SIMD_UOPS_EXEC.AR
1034 The number of SIMD micro-ops retired.
1035 .It Li SIMD_UOPS_EXEC.S
1037 The number of SIMD micro-ops executed.
1038 .It Li SIMD_UOP_TYPE_EXEC.ARITHMETIC.AR
1040 The number of SIMD packed arithmetic micro-ops executed.
1041 .It Li SIMD_UOP_TYPE_EXEC.ARITHMETIC.S
1043 The number of SIMD packed arithmetic micro-ops executed.
1044 .It Li SIMD_UOP_TYPE_EXEC.LOGICAL.AR
1046 The number of SIMD packed logical micro-ops executed.
1047 .It Li SIMD_UOP_TYPE_EXEC.LOGICAL.S
1049 The number of SIMD packed logical micro-ops executed.
1050 .It Li SIMD_UOP_TYPE_EXEC.MUL.AR
1052 The number of SIMD packed multiply micro-ops retired.
1053 .It Li SIMD_UOP_TYPE_EXEC.MUL.S
1055 The number of SIMD packed multiply micro-ops executed.
1056 .It Li SIMD_UOP_TYPE_EXEC.PACK.AR
1058 The number of SIMD pack micro-ops retired.
1059 .It Li SIMD_UOP_TYPE_EXEC.PACK.S
1061 The number of SIMD pack micro-ops executed.
1062 .It Li SIMD_UOP_TYPE_EXEC.SHIFT.AR
1064 The number of SIMD packed shift micro-ops retired.
1065 .It Li SIMD_UOP_TYPE_EXEC.SHIFT.S
1067 The number of SIMD packed shift micro-ops executed.
1068 .It Li SIMD_UOP_TYPE_EXEC.UNPACK.AR
1070 The number of SIMD unpack micro-ops executed.
1071 .It Li SIMD_UOP_TYPE_EXEC.UNPACK.S
1073 The number of SIMD unpack micro-ops executed.
1074 .It Li SNOOP_STALL_DRV Xo
1080 This event is thread-independent.
1081 .It Li SSE_PRE_EXEC.L2
1086 .It Li SSE_PRE_EXEC.STORES
1088 The number of times SSE non-temporal store instructions were executed.
1089 .It Li SSE_PRE_MISS.L1
1094 .It Li SSE_PRE_MISS.L2
1099 .It Li SSE_PRE_MISS.NTA
1104 .It Li STORE_BLOCK.ORDER
1108 .It Li STORE_BLOCK.SNOOP
1112 .It Li STORE_FORWARDS.GOOD
1115 .It Li THERMAL_TRIP
1118 .It Li UOPS_RETIRED.LD_IND_BR
1120 The number of micro-ops retired that fused a load with another
1122 .It Li UOPS_RETIRED.STD_STA
1124 The number of store address calculations that fused into one micro-op.
1125 .It Li UOPS_RETIRED.MACRO_FUSION
1128 micro-op.
1129 .It Li UOPS_RETIRED.FUSED
1131 The number of fused micro-ops retired.
1132 .It Li UOPS_RETIRED.NON_FUSED
1134 The number of non-fused micro-ops retired.
1135 .It Li UOPS_RETIRED.ANY
1137 The number of micro-ops retired.
1138 .It Li X87_COMP_OPS_EXE.ANY.AR
1140 The number of x87 floating-point computational micro-ops retired.
1141 .It Li X87_COMP_OPS_EXE.ANY.S
1143 The number of x87 floating-point computational micro-ops executed.
1144 .It Li X87_OPS_RETIRED.ANY
1147 .It Li X87_OPS_RETIRED.FXCH
1154 The following table shows the mapping between the PMC-independent
1158 .Bl -column "branch-mispredicts" "cpu_clk_unhalted.core_p" "PMC Class"
1160 .It Li branches Ta Li BR_INST_RETIRED.ANY Ta Li PMC_CLASS_IAP
1161 .It Li branch-mispredicts Ta Li BR_INST_RETIRED.MISPRED Ta Li PMC_CLASS_IAP
1162 .It Li ic-misses Ta Li ICACHE.MISSES Ta Li PMC_CLASS_IAP
1163 .It Li instructions Ta Li INST_RETIRED.ANY_P Ta Li PMC_CLASS_IAF
1164 .It Li interrupts Ta Li HW_INT_RCV Ta Li PMC_CLASS_IAP
1165 .It Li unhalted-cycles Ta Li CPU_CLK_UNHALTED.CORE_P Ta Li PMC_CLASS_IAF