Lines Matching +full:non +full:- +full:volatile

2  * Copyright 2018-2022 The OpenSSL Project Authors. All Rights Reserved.
11  * Contemporary compilers implement lock-free atomic memory access
12  * primitives that facilitate writing "thread-opportunistic" or even real
13  * multi-threading low-overhead code. "Thread-opportunistic" is when
21  * This does work provided that loads and stores are single-instruction
29  * bother. Having Thread Sanitizer accept "thread-opportunistic" code
30  * allows to move on trouble-shooting real bugs.
34  * even in "non-opportunistic" scenarios. Most notably verifying if a shared
37  * thread-safe lock-free code, "Thread-Safe ANnotations"...
60 #  define tsan_decr(ptr) atomic_fetch_add_explicit((ptr), -1, memory_order_relaxed)
69 #  define TSAN_QUALIFIER volatile
73 #  define tsan_decr(ptr) __atomic_fetch_add((ptr), -1, __ATOMIC_RELAXED)
82  * There is subtle dependency on /volatile:<iso|ms> command-line option.
84  * memory_order_release for stores, while "iso" - memory_order_relaxed for
87  * compiler versions, while multi-processor ARM can be viewed as brand new
88  * platform to MSC and its users, and with non-relaxed semantic taking toll
92 # define TSAN_QUALIFIER volatile
118 #  define tsan_decr(ptr) (sizeof(*(ptr)) == 8 ? _InterlockedExchangeAdd64((ptr), -1) \
119                                                  : _InterlockedExchangeAdd((ptr), -1))
122 #  define tsan_decr(ptr) _InterlockedExchangeAdd((ptr), -1)
134 #  define TSAN_QUALIFIER volatile
143 # define tsan_decr(ptr) ((*(ptr))--)