Lines Matching defs:CFG
32 #include "llvm/IR/CFG.h"
223 : VF(VF), UF(UF), CFG(DT), LI(LI), Builder(Builder), ILV(ILV), Plan(Plan),
276 BasicBlock *LoopVectorPreHeader = CFG.VPBB2IRBB[cast<VPBasicBlock>(
411 VPBasicBlock::createEmptyBasicBlock(VPTransformState::CFGState &CFG) {
414 BasicBlock *PrevBB = CFG.PrevBB;
416 PrevBB->getParent(), CFG.ExitBB);
423 BasicBlock *PredBB = CFG.VPBB2IRBB[PredVPBB];
447 CFG.DTU.applyUpdates({{DominatorTree::Insert, PredBB, NewBB}});
466 BasicBlock *PredBB = State->CFG.VPBB2IRBB[PredVPBB];
479 State->CFG.DTU.applyUpdates({{DominatorTree::Insert, PredBB, IRBB}});
485 VPBasicBlock *PrevVPBB = State->CFG.PrevVPBB;
487 BasicBlock *NewBB = State->CFG.PrevBB; // Reuse it if possible.
511 NewBB = createEmptyBasicBlock(State->CFG);
513 // Temporarily terminate with unreachable until CFG is rewired.
520 State->CFG.PrevBB = NewBB;
541 State->CFG.VPBB2IRBB[this] = BB;
542 State->CFG.PrevVPBB = this;
658 // Clone the CFG for all nodes reachable from \p Entry, this includes cloning
737 BasicBlock *VectorPH = State->CFG.VPBB2IRBB[getPreheaderVPBB()];
921 IRBuilder<> Builder(State.CFG.PrevBB->getTerminator());
930 IRBuilder<> Builder(State.CFG.PrevBB->getTerminator());
977 // Initialize CFG state.
978 State->CFG.PrevVPBB = nullptr;
979 State->CFG.ExitBB = State->CFG.PrevBB->getSingleSuccessor();
980 BasicBlock *VectorPreHeader = State->CFG.PrevBB;
983 // Disconnect VectorPreHeader from ExitBB in both the CFG and DT.
985 State->CFG.DTU.applyUpdates(
986 {{DominatorTree::Delete, VectorPreHeader, State->CFG.ExitBB}});
992 BasicBlock *MiddleBB = State->CFG.ExitBB;
1011 // header) in both the CFG and DT. The branch will be recreated during VPlan
1016 State->CFG.DTU.applyUpdates({{DominatorTree::Delete, MiddleBB, ScalarPh}});
1023 BasicBlock *VectorLatchBB = State->CFG.VPBB2IRBB[LatchVPBB];
1080 State->CFG.DTU.flush();
1081 assert(State->CFG.DTU.getDomTree().verify(