Lines Matching defs:Subtarget

62   const X86Subtarget &Subtarget =
69       ConstantSize->getZExtValue() > Subtarget.getMaxInlineSizeThreshold())
88       if (Subtarget.is64Bit() && Alignment >= Align(8)) { // QWORD aligned
121   bool Use64BitRegs = Subtarget.isTarget64BitLP64();
156 static SDValue emitRepmovs(const X86Subtarget &Subtarget, SelectionDAG &DAG,
159   const bool Use64BitRegs = Subtarget.isTarget64BitLP64();
178 static SDValue emitRepmovsB(const X86Subtarget &Subtarget, SelectionDAG &DAG,
181   return emitRepmovs(Subtarget, DAG, dl, Chain, Dst, Src,
186 static MVT getOptimalRepmovsType(const X86Subtarget &Subtarget,
199     return Subtarget.is64Bit() ? MVT::i64 : MVT::i32;
208     SelectionDAG &DAG, const X86Subtarget &Subtarget, const SDLoc &dl,
215   if (!AlwaysInline && Size > Subtarget.getMaxInlineSizeThreshold())
219   if (Subtarget.hasERMSB())
220     return emitRepmovsB(Subtarget, DAG, dl, Chain, Dst, Src, Size);
222   assert(!Subtarget.hasERMSB() && "No efficient RepMovs");
228   const MVT BlockType = getOptimalRepmovsType(Subtarget, Alignment);
233       emitRepmovs(Subtarget, DAG, dl, Chain, Dst, Src,
245     return emitRepmovsB(Subtarget, DAG, dl, Chain, Dst, Src, Size);
278   const X86Subtarget &Subtarget =
282   if (UseFSRMForMemcpy && Subtarget.hasFSRM())
283     return emitRepmovs(Subtarget, DAG, dl, Chain, Dst, Src, Size, MVT::i8);
287     return emitConstantSizeRepmov(DAG, Subtarget, dl, Chain, Dst, Src,