Lines Matching defs:BasePtr

70     BasePtr = Use64BitReg ? X86::RBX : X86::EBX;
75     BasePtr = X86::ESI;
575     Register BasePtr = getX86SubSuperRegister(getBaseRegister(), 64);
576     for (const MCPhysReg &SubReg : subregs_inclusive(BasePtr))
793     return MRI->canReserveReg(BasePtr);
818   Register BasePtr = MI.getOperand(1).getReg();
823     BasePtr = getX86SubSuperRegister(BasePtr, 32);
827   TII->copyPhysReg(*MI.getParent(), II, MI.getDebugLoc(), NewDestReg, BasePtr,
861     assert(BasePtr == FramePtr && "Expected the FP as base register");
898   Register BasePtr;
904         TFI->getFrameIndexReferenceSP(MF, FrameIndex, BasePtr, 0).getFixed();
906     FIOffset = TFI->getWin64EHFrameIndexRef(MF, FrameIndex, BasePtr);
908     FIOffset = TFI->getFrameIndexReference(MF, FrameIndex, BasePtr).getFixed();
923   // For LEA64_32r when BasePtr is 32-bits (X32) we can use full-size 64-bit
926   // Don't change BasePtr since it is used later for stack adjustment.
927   Register MachineBasePtr = BasePtr;
928   if (Opc == X86::LEA64_32r && X86::GR32RegClass.contains(BasePtr))
929     MachineBasePtr = getX86SubSuperRegister(BasePtr, 64);
935   if (BasePtr == StackPtr)
941     assert(BasePtr == FramePtr && "Expected the FP as base register");