Lines Matching defs:LoadMI

7550 /// Check if \p LoadMI is a partial register load that we can't fold into \p MI
7564 static bool isNonFoldablePartialRegisterLoad(const MachineInstr &LoadMI,
7567   unsigned Opc = LoadMI.getOpcode();
7571       MF.getRegInfo().getRegClass(LoadMI.getOperand(0).getReg());
7988     MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
7991   // TODO: Support the case where LoadMI loads a wide register, but MI
7999   unsigned NumOps = LoadMI.getDesc().getNumOperands();
8001   if (isLoadFromStackSlot(LoadMI, FrameIndex)) {
8002     if (isNonFoldablePartialRegisterLoad(LoadMI, MI, MF))
8019   unsigned LoadOpc = LoadMI.getOpcode();
8020   if (LoadMI.hasOneMemOperand())
8021     Alignment = (*LoadMI.memoperands_begin())->getAlign();
8083   if (LoadMI.getOperand(0).getSubReg() != MI.getOperand(Ops[0]).getSubReg())
8203   MOs.append(LoadMI.operands_begin() + NumOps - X86::AddrNumOperands,          \
8204              LoadMI.operands_begin() + NumOps);                                \
8225     if (isNonFoldablePartialRegisterLoad(LoadMI, MI, MF))
8229     MOs.append(LoadMI.operands_begin() + NumOps - X86::AddrNumOperands,
8230                LoadMI.operands_begin() + NumOps);