Lines Matching defs:Arg1

442   Value *Arg1 = II.getArgOperand(1);
446   if (isa<UndefValue>(Arg0) && isa<UndefValue>(Arg1))
462   if (!isa<Constant>(Arg0) || !isa<Constant>(Arg1))
487   Arg1 = Builder.CreateSelect(Builder.CreateICmpSLT(Arg1, MinC), MinC, Arg1);
489   Arg1 = Builder.CreateSelect(Builder.CreateICmpSGT(Arg1, MaxC), MaxC, Arg1);
499   auto *Shuffle = Builder.CreateShuffleVector(Arg0, Arg1, PackMask);
509   Value *Arg1 = II.getArgOperand(1);
517   if (isa<UndefValue>(Arg0) || isa<UndefValue>(Arg1))
521   if (isa<ConstantAggregateZero>(Arg0) || isa<ConstantAggregateZero>(Arg1))
527       return IsSigned ? Builder.CreateAShr(Arg1, 15)
529     if (match(Arg1, m_One()))
535   if (!isa<Constant>(Arg0) || !isa<Constant>(Arg1))
543   Value *RHS = Builder.CreateCast(Cast, Arg1, ExtTy);
567   Value *Arg1 = II.getArgOperand(1);
577   if (isa<UndefValue>(Arg0) || isa<UndefValue>(Arg1))
581   if (isa<ConstantAggregateZero>(Arg0) || isa<ConstantAggregateZero>(Arg1))
585   if (!isa<Constant>(Arg0) || !isa<Constant>(Arg1))
601   auto *RHSLo = Builder.CreateShuffleVector(Arg1, LoMask);
602   auto *RHSHi = Builder.CreateShuffleVector(Arg1, HiMask);
2373     Value *Arg1 = II.getArgOperand(1);
2379     if (Value *V = SimplifyDemandedVectorEltsLow(Arg1, VWidth, 1)) {
2402         Value *Arg1 = II.getArgOperand(1);
2410           V = IC.Builder.CreateFAdd(Arg0, Arg1);
2414           V = IC.Builder.CreateFSub(Arg0, Arg1);
2418           V = IC.Builder.CreateFMul(Arg0, Arg1);
2422           V = IC.Builder.CreateFDiv(Arg0, Arg1);
2445         Value *Arg1 = II.getArgOperand(1);
2447         Value *RHS = IC.Builder.CreateExtractElement(Arg1, (uint64_t)0);
2564     Value *Arg1 = II.getArgOperand(1);
2565     assert(Arg1->getType()->getPrimitiveSizeInBits() == 128 &&
2567     unsigned VWidth = cast<FixedVectorType>(Arg1->getType())->getNumElements();
2569     if (Value *V = SimplifyDemandedVectorEltsLow(Arg1, VWidth, VWidth / 2)) {
2677       Value *Arg1 = II.getArgOperand(1);
2694               IC.SimplifyDemandedVectorElts(Arg1, DemandedElts2, UndefElts2)) {
3246       Value *Arg0 = II.getArgOperand(0), *Arg1 = II.getArgOperand(1);
3248           IsSubOnly ? Instruction::FSub : Instruction::FAdd, Arg0, Arg1);