Lines Matching defs:X86TargetLowering

127 X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
2596 bool X86TargetLowering::useLoadStackGuardNode() const {
2600 bool X86TargetLowering::useStackGuardXorFP() const {
2605 SDValue X86TargetLowering::emitStackGuardXorFP(SelectionDAG &DAG, SDValue Val,
2614 X86TargetLowering::getPreferredVectorAction(MVT VT) const {
2631 X86TargetLowering::createFastISel(FunctionLoweringInfo &funcInfo,
2750 SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) const {
2942 bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
3091 bool X86TargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
3099 bool X86TargetLowering::shouldReduceLoadWidth(SDNode *Load,
3135 bool X86TargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,
3145 bool X86TargetLowering::reduceSelectOfFPConstantLoads(EVT CmpOpVT) const {
3154 bool X86TargetLowering::convertSelectOfConstantsToMath(EVT VT) const {
3163 bool X86TargetLowering::decomposeMulByConstant(LLVMContext &Context, EVT VT,
3195 bool X86TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,
3209 bool X86TargetLowering::shouldScalarizeBinop(SDValue VecOp) const {
3228 bool X86TargetLowering::shouldFormOverflowOp(unsigned Opcode, EVT VT,
3236 bool X86TargetLowering::isCheapToSpeculateCttz(Type *Ty) const {
3242 bool X86TargetLowering::isCheapToSpeculateCtlz(Type *Ty) const {
3247 bool X86TargetLowering::ShouldShrinkFPConstant(EVT VT) const {
3254 bool X86TargetLowering::isScalarFPTypeInSSEReg(EVT VT) const {
3259 bool X86TargetLowering::isLoadBitCastBeneficial(EVT LoadVT, EVT BitcastVT,
3277 bool X86TargetLowering::canMergeStoresTo(unsigned AddressSpace, EVT MemVT,
3295 bool X86TargetLowering::isCtlzFast() const {
3299 bool X86TargetLowering::isMaskAndCmp0FoldingBeneficial(
3304 bool X86TargetLowering::hasAndNotCompare(SDValue Y) const {
3320 bool X86TargetLowering::hasAndNot(SDValue Y) const {
3337 bool X86TargetLowering::hasBitTest(SDValue X, SDValue Y) const {
3341 bool X86TargetLowering::
3364 unsigned X86TargetLowering::preferedOpcodeForCmpEqPiecesOfOperand(
3432 X86TargetLowering::getJumpConditionMergingParams(Instruction::BinaryOps Opc,
3452 bool X86TargetLowering::preferScalarizeSplat(SDNode *N) const {
3456 bool X86TargetLowering::shouldFoldConstantShiftPairToMask(
3475 bool X86TargetLowering::shouldFoldMaskToVariableShiftPair(SDValue Y) const {
3490 X86TargetLowering::preferredShiftLegalizationStrategy(
3499 bool X86TargetLowering::shouldSplatInsEltVarIndex(EVT VT) const {
3505 MVT X86TargetLowering::hasFastEqualityCompare(unsigned NumBits) const {
4726 X86TargetLowering::getTargetConstantFromLoad(LoadSDNode *LD) const {
8773 X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
17777 SDValue X86TargetLowering::LowerVSELECT(SDValue Op, SelectionDAG &DAG) const {
18021 X86TargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,
18202 SDValue X86TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
18483 unsigned X86TargetLowering::getGlobalWrapperKind(
18509 X86TargetLowering::LowerConstantPool(SDValue Op, SelectionDAG &DAG) const {
18532 SDValue X86TargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
18554 SDValue X86TargetLowering::LowerExternalSymbol(SDValue Op,
18560 X86TargetLowering::LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const {
18583 SDValue X86TargetLowering::LowerGlobalOrExternal(SDValue Op, SelectionDAG &DAG,
18658 X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const {
18839 X86TargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {
18984 bool X86TargetLowering::addressingModeSupportsTLS(const GlobalValue &GV) const {
19338 SDValue X86TargetLowering::LowerSINT_TO_FP(SDValue Op,
19436 std::pair<SDValue, SDValue> X86TargetLowering::BuildFILD(
19837 SDValue X86TargetLowering::LowerUINT_TO_FP(SDValue Op,
19996 SDValue X86TargetLowering::FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG,
20696 SDValue X86TargetLowering::LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const {
20856 SDValue X86TargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG) const {
21216 SDValue X86TargetLowering::LowerLRINT_LLRINT(SDValue Op,
21235 SDValue X86TargetLowering::LRINT_LLRINTHelper(SDNode *N,
21281 X86TargetLowering::LowerFP_TO_INT_SAT(SDValue Op, SelectionDAG &DAG) const {
21430 SDValue X86TargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
21548 SDValue X86TargetLowering::LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {
21701 SDValue X86TargetLowering::LowerFP_TO_BF16(SDValue Op,
21799 SDValue X86TargetLowering::lowerFaddFsub(SDValue Op, SelectionDAG &DAG) const {
22784 bool X86TargetLowering::isXAndYEqZeroPreferableToXAndYEqY(ISD::CondCode Cond,
22789 bool X86TargetLowering::optimizeFMulOrFDivAsShiftAddBitcast(
22808 bool X86TargetLowering::isFsqrtCheap(SDValue Op, SelectionDAG &DAG) const {
22826 SDValue X86TargetLowering::getSqrtEstimate(SDValue Op,
22880 SDValue X86TargetLowering::getRecipEstimate(SDValue Op, SelectionDAG &DAG,
22935 unsigned X86TargetLowering::combineRepeatedFPDivisors() const {
22940 X86TargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,
23752 SDValue X86TargetLowering::emitFlagsForSetcc(SDValue Op0, SDValue Op1,
23841 SDValue X86TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
23931 SDValue X86TargetLowering::LowerSETCCCARRY(SDValue Op, SelectionDAG &DAG) const {
24041 SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
24801 SDValue X86TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
24926 X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
25020 SDValue X86TargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
25077 SDValue X86TargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG) const {
25475 SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
27281 SDValue X86TargetLowering::LowerRETURNADDR(SDValue Op,
27308 SDValue X86TargetLowering::LowerADDROFRETURNADDR(SDValue Op,
27314 SDValue X86TargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const {
27354 Register X86TargetLowering::getRegisterByName(const char* RegName, LLT VT,
27387 SDValue X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDValue Op,
27393 Register X86TargetLowering::getExceptionPointerRegister(
27401 Register X86TargetLowering::getExceptionSelectorRegister(
27409 bool X86TargetLowering::needsFixedCatchObjects() const {
27413 SDValue X86TargetLowering::LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const {
27439 SDValue X86TargetLowering::lowerEH_SJLJ_SETJMP(SDValue Op,
27457 SDValue X86TargetLowering::lowerEH_SJLJ_LONGJMP(SDValue Op,
27464 SDValue X86TargetLowering::lowerEH_SJLJ_SETUP_DISPATCH(SDValue Op,
27475 SDValue X86TargetLowering::LowerINIT_TRAMPOLINE(SDValue Op,
27620 SDValue X86TargetLowering::LowerGET_ROUNDING(SDValue Op,
27684 SDValue X86TargetLowering::LowerSET_ROUNDING(SDValue Op,
27802 SDValue X86TargetLowering::LowerGET_FPENV_MEM(SDValue Op,
27869 SDValue X86TargetLowering::LowerSET_FPENV_MEM(SDValue Op,
27881 SDValue X86TargetLowering::LowerRESET_FPENV(SDValue Op,
28945 SDValue X86TargetLowering::LowerWin64_i128OP(SDValue Op, SelectionDAG &DAG) const {
29010 SDValue X86TargetLowering::LowerWin64_FP_TO_INT128(SDValue Op,
29044 SDValue X86TargetLowering::LowerWin64_INT128_TO_FP(SDValue Op,
30465 bool X86TargetLowering::needsCmpXchgNb(Type *MemType) const {
30477 X86TargetLowering::shouldExpandAtomicStoreInIR(StoreInst *SI) const {
30497 X86TargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const {
30593 X86TargetLowering::shouldExpandLogicAtomicRMWInIR(AtomicRMWInst *AI) const {
30668 void X86TargetLowering::emitBitTestAtomicRMWIntrinsic(AtomicRMWInst *AI) const {
30808 void X86TargetLowering::emitCmpArithAtomicRMWIntrinsic(
30873 X86TargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
30919 X86TargetLowering::lowerIdempotentRMWIntoFencedLoad(AtomicRMWInst *AI) const {
32204 SDValue X86TargetLowering::LowerGC_TRANSITION(SDValue Op,
32290 bool X86TargetLowering::isInlineAsmTargetBranch(
32312 SDValue X86TargetLowering::visitMaskedLoad(
32332 SDValue X86TargetLowering::visitMaskedStore(SelectionDAG &DAG, const SDLoc &DL,
32350 SDValue X86TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
32510 void X86TargetLowering::ReplaceNodeResults(SDNode *N,
33660 const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
34074 bool X86TargetLowering::isLegalAddressingMode(const DataLayout &DL,
34126 bool X86TargetLowering::isVectorShiftByScalarCheap(Type *Ty) const {
34149 bool X86TargetLowering::isBinOp(unsigned Opcode) const {
34169 bool X86TargetLowering::isCommutativeBinOp(unsigned Opcode) const {
34186 bool X86TargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {
34194 bool X86TargetLowering::allowTruncateForTailCall(Type *Ty1, Type *Ty2) const {
34208 bool X86TargetLowering::isLegalICmpImmediate(int64_t Imm) const {
34212 bool X86TargetLowering::isLegalAddImmediate(int64_t Imm) const {
34217 bool X86TargetLowering::isLegalStoreImmediate(int64_t Imm) const {
34221 bool X86TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
34229 bool X86TargetLowering::isZExtFree(Type *Ty1, Type *Ty2) const {
34234 bool X86TargetLowering::isZExtFree(EVT VT1, EVT VT2) const {
34239 bool X86TargetLowering::isZExtFree(SDValue Val, EVT VT2) const {
34263 bool X86TargetLowering::shouldSinkOperands(Instruction *I,
34320 bool X86TargetLowering::shouldConvertPhiType(Type *From, Type *To) const {
34326 bool X86TargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const {
34339 bool X86TargetLowering::isFMAFasterThanFMulAndFAdd(const MachineFunction &MF,
34362 bool X86TargetLowering::isNarrowingProfitable(EVT SrcVT, EVT DestVT) const {
34367 bool X86TargetLowering::shouldFoldSelectWithIdentityConstant(unsigned Opcode,
34385 bool X86TargetLowering::isShuffleMaskLegal(ArrayRef<int> Mask, EVT VT) const {
34402 bool X86TargetLowering::isVectorClearMaskLegal(ArrayRef<int> Mask,
34414 bool X86TargetLowering::areJTsAllowed(const Function *Fn) const {
34423 MVT X86TargetLowering::getPreferredSwitchConditionType(LLVMContext &Context,
34542 X86TargetLowering::EmitVAARGWithCustomInserter(MachineInstr &MI,
34936 X86TargetLowering::EmitLoweredCascadedSelect(MachineInstr &FirstCMOV,
35089 X86TargetLowering::EmitLoweredSelect(MachineInstr &MI,
35239 X86TargetLowering::EmitLoweredProbedAlloca(MachineInstr &MI,
35333 X86TargetLowering::EmitLoweredSegAlloca(MachineInstr &MI,
35467 X86TargetLowering::EmitLoweredCatchRet(MachineInstr &MI,
35502 X86TargetLowering::EmitLoweredTLSAddr(MachineInstr &MI,
35532 X86TargetLowering::EmitLoweredTLSCall(MachineInstr &MI,
35675 X86TargetLowering::EmitLoweredIndirectThunk(MachineInstr &MI,
35739 void X86TargetLowering::emitSetJmpShadowStackFix(MachineInstr &MI,
35782 X86TargetLowering::emitEHSjLjSetJmp(MachineInstr &MI,
35943 X86TargetLowering::emitLongJmpShadowStackFix(MachineInstr &MI,
36133 X86TargetLowering::emitEHSjLjLongJmp(MachineInstr &MI,
36215 void X86TargetLowering::SetupEntryBlockForSjLj(MachineInstr &MI,
36266 X86TargetLowering::EmitSjLjDispatchBlock(MachineInstr &MI,
36497 X86TargetLowering::emitPatchableEventCall(MachineInstr &MI,
36522 X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
36788     // After X86TargetLowering::ReplaceNodeResults CMPXCHG8B is glued to its
37014 X86TargetLowering::targetShrinkDemandedConstant(SDValue Op,
37197 void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
37630 unsigned X86TargetLowering::ComputeNumSignBitsForTargetNode(
37799 SDValue X86TargetLowering::unwrapAddress(SDValue N) const {
41815 bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetShuffle(
41882 bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
42649 bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
43163 SDValue X86TargetLowering::SimplifyMultipleUseDemandedBitsForTargetNode(
43283 bool X86TargetLowering::isGuaranteedNotToBeUndefOrPoisonForTargetNode(
43319 bool X86TargetLowering::canCreateUndefOrPoisonForTargetNode(
43342 bool X86TargetLowering::isSplatValueForTargetNode(SDValue Op,
52873 SDValue X86TargetLowering::getNegatedExpression(SDValue Op, SelectionDAG &DAG,
53810 //     1) X86TargetLowering::EmitLoweredSelect later can do merging of two
56667     const X86TargetLowering *TLI = Subtarget.getTargetLowering();
57745 SDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
57941 bool X86TargetLowering::preferABDSToABSWithNSW(EVT VT) const {
57946 bool X86TargetLowering::preferSextInRegOfTruncate(EVT TruncVT, EVT VT,
57951 bool X86TargetLowering::isTypeDesirableForOp(unsigned Opc, EVT VT) const {
58001 SDValue X86TargetLowering::expandIndirectJTBranch(const SDLoc &dl,
58020 X86TargetLowering::isDesirableToCombineLogicOpOfSETCC(
58042 bool X86TargetLowering::IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const {
58162 bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const {
58273 X86TargetLowering::ConstraintType
58274 X86TargetLowering::getConstraintType(StringRef Constraint) const {
58353 X86TargetLowering::getSingleConstraintMatchWeight(
58502 const char *X86TargetLowering::
58515 SDValue X86TargetLowering::LowerAsmOutputForConstraint(
58542 void X86TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
58739 X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
59243 bool X86TargetLowering::isIntDivCheap(EVT VT, AttributeList Attr) const {
59255 void X86TargetLowering::initializeSplitCSR(MachineBasicBlock *Entry) const {
59265 void X86TargetLowering::insertCopiesSplitCSR(
59304 bool X86TargetLowering::supportSwiftError() const {
59309 X86TargetLowering::EmitKCFICheck(MachineBasicBlock &MBB,
59356     // X86TargetLowering::EmitLoweredIndirectThunk always uses r11 for
59374 bool X86TargetLowering::hasStackProbeSymbol(const MachineFunction &MF) const {
59379 bool X86TargetLowering::hasInlineStackProbe(const MachineFunction &MF) const {
59397 X86TargetLowering::getStackProbeSymbolName(const MachineFunction &MF) const {
59420 X86TargetLowering::getStackProbeSize(const MachineFunction &MF) const {
59427 Align X86TargetLowering::getPrefLoopAlignment(MachineLoop *ML) const {