Lines Matching defs:SrcOps

4298   SmallVector<SDValue> SrcOps(Ops.begin(), Ops.end());
4299   for (SDValue &Op : SrcOps) {
4316   SDValue Res = DAG.getNode(Opcode, DL, DstVT, SrcOps);
22220                                  SmallVectorImpl<SDValue> &SrcOps,
22263       SrcOps.push_back(Src);
22275     for (SDValue &SrcOp : SrcOps)
39700     ArrayRef<SDValue> SrcOps, int SrcOpIndex, SDValue Root,
39719   SDValue Op = SrcOps[SrcOpIndex];
39832     Ops.append(SrcOps.begin(), SrcOps.end());
49881   // TODO: Support multiple SrcOps.
49883     SmallVector<SDValue, 2> SrcOps;
49885     if (matchScalarReduction(SDValue(N, 0), ISD::AND, SrcOps, &SrcPartials) &&
49886         SrcOps.size() == 1) {
49887       unsigned NumElts = SrcOps[0].getValueType().getVectorNumElements();
49889       SDValue Mask = combineBitcastvxi1(DAG, MaskVT, SrcOps[0], dl, Subtarget);
49890       if (!Mask && TLI.isTypeLegal(SrcOps[0].getValueType()))
49891         Mask = DAG.getBitcast(MaskVT, SrcOps[0]);
50700   // TODO: Support multiple SrcOps.
50702     SmallVector<SDValue, 2> SrcOps;
50704     if (matchScalarReduction(SDValue(N, 0), ISD::OR, SrcOps, &SrcPartials) &&
50705         SrcOps.size() == 1) {
50706       unsigned NumElts = SrcOps[0].getValueType().getVectorNumElements();
50708       SDValue Mask = combineBitcastvxi1(DAG, MaskVT, SrcOps[0], dl, Subtarget);
50709       if (!Mask && TLI.isTypeLegal(SrcOps[0].getValueType()))
50710         Mask = DAG.getBitcast(MaskVT, SrcOps[0]);
51941     SmallVector<SDValue, 2> SrcOps;
51944     if (getTargetShuffleInputs(BC, SrcOps, SrcMask, DAG) &&
51945         !isAnyZero(SrcMask) && all_of(SrcOps, [BC](SDValue Op) {
51948       resolveTargetShuffleInputsAndMask(SrcOps, SrcMask);
51949       if (!UseSubVector && SrcOps.size() <= 2 &&
51951         N0 = !SrcOps.empty() ? SrcOps[0] : SDValue();
51952         N1 = SrcOps.size() > 1 ? SrcOps[1] : SDValue();
51955       if (UseSubVector && SrcOps.size() == 1 &&
51957         std::tie(N0, N1) = DAG.SplitVector(SrcOps[0], SDLoc(Op));