Lines Matching defs:ShiftVal

6170     uint64_t ShiftVal = N.getConstantOperandVal(1);
6172     if (NumBitsPerElt <= ShiftVal) {
6178     if ((ShiftVal % 8) != 0)
6181     uint64_t ByteShift = ShiftVal / 8;
6770   SDValue ShiftVal = DAG.getTargetConstant(NumBits / 8, dl, MVT::i8);
6771   return DAG.getBitcast(VT, DAG.getNode(Opc, dl, ShVT, SrcOp, ShiftVal));
18124       int ShiftVal = (IdxVal % 4) * 8;
18125       if (ShiftVal != 0)
18127                           DAG.getConstant(ShiftVal, dl, MVT::i8));
18136       int ShiftVal = (IdxVal % 2) * 8;
18137       if (ShiftVal != 0)
18139                           DAG.getConstant(ShiftVal, dl, MVT::i8));
30568       auto *ShiftVal = dyn_cast<ConstantInt>(I->getOperand(0));
30569       if (!ShiftVal)
30571       if (ShiftVal->equalsInt(1))
37698     const APInt &ShiftVal = Op.getConstantOperandAPInt(1);
37699     if (ShiftVal.uge(VTBits))
37702     if (ShiftVal.uge(Tmp))
37704     return Tmp - ShiftVal.getZExtValue();
37709     APInt ShiftVal = Op.getConstantOperandAPInt(1);
37710     if (ShiftVal.uge(VTBits - 1))
37713     ShiftVal += Tmp;
37714     return ShiftVal.uge(VTBits) ? VTBits : ShiftVal.getZExtValue();
48711   unsigned ShiftVal = N->getConstantOperandVal(1);
48712   if (ShiftVal >= NumBitsPerElt) {
48715     ShiftVal = NumBitsPerElt - 1;
48719   if (!ShiftVal)
48749     return MergeShifts(N0.getOperand(0), ShiftVal, N0.getConstantOperandVal(1));
48754     return MergeShifts(N0.getOperand(0), ShiftVal, 1);
48757   if (LogicalShift && (ShiftVal % 8) == 0) {
48767   if (Opcode == X86ISD::VSRAI && NumBitsPerElt == 32 && ShiftVal == 31 &&
48803         Elt <<= ShiftVal;
48805         Elt.ashrInPlace(ShiftVal);
48807         Elt.lshrInPlace(ShiftVal);
49442   unsigned ShiftVal = SplatVal.countr_one();
49443   SDValue ShAmt = DAG.getTargetConstant(EltBitWidth - ShiftVal, DL, MVT::i8);