Lines Matching defs:SSECC

23048   unsigned SSECC;
23064   case ISD::SETEQ:  SSECC = 0; break;
23068   case ISD::SETOLT: SSECC = 1; break;
23072   case ISD::SETOLE: SSECC = 2; break;
23073   case ISD::SETUO:  SSECC = 3; break;
23075   case ISD::SETNE:  SSECC = 4; break;
23077   case ISD::SETUGE: SSECC = 5; break;
23079   case ISD::SETUGT: SSECC = 6; break;
23080   case ISD::SETO:   SSECC = 7; break;
23081   case ISD::SETUEQ: SSECC = 8; break;
23082   case ISD::SETONE: SSECC = 12; break;
23104   return SSECC;
23290     unsigned SSECC = translateX86FSETCC(Cond, Op0, Op1, IsAlwaysSignaling);
23353               {Chain, Op0, Op1, DAG.getTargetConstant(SSECC, dl, MVT::i8)});
23357               Opc, dl, VT, Op0, Op1, DAG.getTargetConstant(SSECC, dl, MVT::i8));
23363         SSECC |= (IsAlwaysSignaling ^ IsSignaling) << 4;
23366             {Chain, Op0, Op1, DAG.getTargetConstant(SSECC, dl, MVT::i8)});
23370             Opc, dl, VT, Op0, Op1, DAG.getTargetConstant(SSECC, dl, MVT::i8));
24064     unsigned SSECC =
24071                       DAG.getTargetConstant(SSECC, DL, MVT::i8));
24076     if (SSECC < 8 || Subtarget.hasAVX()) {
24078                                 DAG.getTargetConstant(SSECC, DL, MVT::i8));