Lines Matching defs:ResVT
3195 bool X86TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,
3197 if (!isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, ResVT))
3202 if (ResVT.getVectorElementType() == MVT::i1)
3203 return Index == 0 || ((ResVT.getSizeInBits() == SrcVT.getSizeInBits()*2) &&
3204 (Index == ResVT.getVectorNumElements()));
3206 return (Index % ResVT.getVectorNumElements()) == 0;
9217 MVT ResVT = Op.getSimpleValueType();
9219 assert((ResVT.is256BitVector() ||
9220 ResVT.is512BitVector()) && "Value type must be 256-/512-bit wide");
9249 MVT HalfVT = ResVT.getHalfNumVectorElementsVT();
9255 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
9259 SDValue Vec = NumZero ? getZeroVector(ResVT, Subtarget, DAG, dl)
9260 : (NumFreezeUndef ? DAG.getFreeze(DAG.getUNDEF(ResVT))
9261 : DAG.getUNDEF(ResVT));
9269 Vec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, Vec,
9285 MVT ResVT = Op.getSimpleValueType();
9304 unsigned NumElems = ResVT.getVectorNumElements();
9314 MVT ShiftVT = widenMaskVectorType(ResVT, Subtarget);
9318 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResVT, Op,
9324 SDValue Vec = Zeros ? DAG.getConstant(0, dl, ResVT) : DAG.getUNDEF(ResVT);
9330 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, Vec, SubVec,
9335 MVT HalfVT = ResVT.getHalfNumVectorElementsVT();
9341 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
9346 if (ResVT.getVectorNumElements() >= 16)
9349 SDValue Vec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT,
9350 DAG.getUNDEF(ResVT), Op.getOperand(0),
9352 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, Vec, Op.getOperand(1),
20077 EVT ResVT = getSetCCResultType(DAG.getDataLayout(),
20081 Cmp = DAG.getSetCC(DL, ResVT, Value, ThreshVal, ISD::SETGE, Chain,
20085 Cmp = DAG.getSetCC(DL, ResVT, Value, ThreshVal, ISD::SETGE);
20881 MVT ResVT = MVT::v4i32;
20892 ResVT = MVT::v8i32;
20904 Res = DAG.getNode(Opc, dl, {ResVT, MVT::Other}, {Chain, Src});
20907 Res = DAG.getNode(Opc, dl, ResVT, Src);
20922 MVT ResVT = VT;
20925 ResVT = EleVT == MVT::i32 ? MVT::v4i32 : MVT::v8i16;
20938 dl, {ResVT, MVT::Other}, {Chain, Src});
20942 ResVT, Src);
20947 ResVT = MVT::getVectorVT(EleVT, 8);
20948 Res = DAG.getNode(ISD::TRUNCATE, dl, ResVT, Res);
20951 if (ResVT != VT)
20998 MVT ResVT = SrcVT == MVT::v4f64 ? MVT::v8i32 : MVT::v16i32;
21008 Res = DAG.getNode(ISD::STRICT_FP_TO_UINT, dl, {ResVT, MVT::Other},
21012 Res = DAG.getNode(ISD::FP_TO_UINT, dl, ResVT, Src);
32702 EVT ResVT = getTypeToTransformTo(*DAG.getContext(), VT);
32703 SDValue N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Ops0);
32704 SDValue N1 = DAG.getConstant(SplatVal, dl, ResVT);
32705 SDValue Res = DAG.getNode(N->getOpcode(), dl, ResVT, N0, N1);
32924 EVT ResVT = EleVT == MVT::i32 ? MVT::v4i32 : MVT::v8i16;
32938 DAG.getNode(Opc, dl, {ResVT, MVT::Other}, {N->getOperand(0), Src});
32942 Res = DAG.getNode(Opc, dl, ResVT, Src);
44555 EVT ResVT =
44558 DP = DAG.getBitcast(ResVT, DP);
44630 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), ExtractVT,
44632 SAD = DAG.getBitcast(ResVT, SAD);
47593 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, NumElts / 2);
47610 ResLo = DAG.getBitcast(ResVT, ResLo);
47618 ResHi = DAG.getBitcast(ResVT, ResHi);
47813 MVT ResVT = MVT::getVectorVT(MVT::i32, Ops[0].getValueSizeInBits() / 32);
47815 return DAG.getNode(X86ISD::VPMADDWD, DL, ResVT,
52616 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i16,
52618 return DAG.getNode(X86ISD::VPMADDUBSW, DL, ResVT, Ops[0], Ops[1]);
55516 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32,
55518 return DAG.getNode(X86ISD::VPMADDWD, DL, ResVT, Ops[0], Ops[1]);
55641 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32,
55643 return DAG.getNode(X86ISD::VPMADDWD, DL, ResVT, Ops[0], Ops[1]);