Lines Matching defs:Rdx

44997   SDValue Rdx = DAG.matchBinOpReduction(ExtElt, Opc,
44999 if (!Rdx)
45007 EVT VecVT = Rdx.getValueType();
45039 SDValue Lo = getUnpackl(DAG, DL, VecVT, Rdx, DAG.getUNDEF(VecVT));
45040 SDValue Hi = getUnpackh(DAG, DL, VecVT, Rdx, DAG.getUNDEF(VecVT));
45043 Rdx = DAG.getNode(Opc, DL, WideVT, Lo, Hi);
45044 while (Rdx.getValueSizeInBits() > 128) {
45045 std::tie(Lo, Hi) = splitVector(Rdx, DAG, DL);
45046 Rdx = DAG.getNode(Opc, DL, Lo.getValueType(), Lo, Hi);
45049 Rdx = WidenToV16I8(Rdx, false);
45050 Rdx = getUnpackl(DAG, DL, MVT::v16i8, Rdx, DAG.getUNDEF(MVT::v16i8));
45051 Rdx = DAG.getBitcast(MVT::v8i16, Rdx);
45054 Rdx = DAG.getNode(Opc, DL, MVT::v8i16, Rdx,
45055 DAG.getVectorShuffle(MVT::v8i16, DL, Rdx, Rdx,
45057 Rdx = DAG.getNode(Opc, DL, MVT::v8i16, Rdx,
45058 DAG.getVectorShuffle(MVT::v8i16, DL, Rdx, Rdx,
45060 Rdx = DAG.getNode(Opc, DL, MVT::v8i16, Rdx,
45061 DAG.getVectorShuffle(MVT::v8i16, DL, Rdx, Rdx,
45063 Rdx = DAG.getBitcast(MVT::v16i8, Rdx);
45064 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Rdx, Index);
45069 Rdx = WidenToV16I8(Rdx, true);
45070 Rdx = DAG.getNode(X86ISD::PSADBW, DL, MVT::v2i64, Rdx,
45072 Rdx = DAG.getBitcast(MVT::v16i8, Rdx);
45073 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Rdx, Index);
45082 while (Rdx.getValueSizeInBits() > 128) {
45084 std::tie(Lo, Hi) = splitVector(Rdx, DAG, DL);
45086 Rdx = DAG.getNode(ISD::ADD, DL, VecVT, Lo, Hi);
45091 MVT::v16i8, DL, Rdx, Rdx,
45093 Rdx = DAG.getNode(ISD::ADD, DL, MVT::v16i8, Rdx, Hi);
45094 Rdx = DAG.getNode(X86ISD::PSADBW, DL, MVT::v2i64, Rdx,
45096 Rdx = DAG.getBitcast(MVT::v16i8, Rdx);
45097 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Rdx, Index);
45105 DAG.computeKnownBits(Rdx).getMaxValue().ule(255) &&
45106 (EltSizeInBits == 16 || Rdx.getOpcode() == ISD::ZERO_EXTEND ||
45108 if (Rdx.getValueType() == MVT::v8i16) {
45109 Rdx = DAG.getNode(X86ISD::PACKUS, DL, MVT::v16i8, Rdx,
45113 Rdx = DAG.getNode(ISD::TRUNCATE, DL, ByteVT, Rdx);
45115 Rdx = WidenToV16I8(Rdx, true);
45125 MVT SadVT = MVT::getVectorVT(MVT::i64, Rdx.getValueSizeInBits() / 64);
45126 Rdx = SplitOpsAndApply(DAG, Subtarget, DL, SadVT, {Rdx}, PSADBWBuilder);
45129 while (Rdx.getValueSizeInBits() > 128) {
45131 std::tie(Lo, Hi) = splitVector(Rdx, DAG, DL);
45133 Rdx = DAG.getNode(ISD::ADD, DL, VecVT, Lo, Hi);
45135 assert(Rdx.getValueType() == MVT::v2i64 && "v2i64 reduction expected");
45138 SDValue RdxHi = DAG.getVectorShuffle(MVT::v2i64, DL, Rdx, Rdx, {1, -1});
45139 Rdx = DAG.getNode(ISD::ADD, DL, MVT::v2i64, Rdx, RdxHi);
45143 Rdx = DAG.getBitcast(VecVT, Rdx);
45144 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Rdx, Index);
45160 SDValue Hi = extract128BitVector(Rdx, NumElts / 2, DAG, DL);
45161 SDValue Lo = extract128BitVector(Rdx, 0, DAG, DL);
45162 Rdx = DAG.getNode(HorizOpcode, DL, Lo.getValueType(), Hi, Lo);
45163 VecVT = Rdx.getValueType();
45172 Rdx = DAG.getNode(HorizOpcode, DL, VecVT, Rdx, Rdx);
45174 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Rdx, Index);