Lines Matching defs:RLo
28508 SDValue RLo = DAG.getNode(X86ISD::VPMADDUBSW, dl, ExVT, A, BLo);
28510 RLo = DAG.getNode(ISD::AND, dl, VT, DAG.getBitcast(VT, RLo), Mask);
28513 return DAG.getNode(ISD::OR, dl, VT, RLo, DAG.getBitcast(VT, RHi));
28546 SDValue RLo = DAG.getNode(ISD::MUL, dl, ExVT, ALo, BLo);
28548 return getPack(DAG, Subtarget, dl, VT, RLo, RHi);
28698 SDValue RLo = DAG.getNode(MulOpc, dl, ExVT, ALo, BLo);
28702 *Low = getPack(DAG, Subtarget, dl, VT, RLo, RHi);
28704 return getPack(DAG, Subtarget, dl, VT, RLo, RHi, /*PackHiHalf*/ true);
29815 SDValue RLo = getUnpackl(DAG, dl, VT, DAG.getUNDEF(VT), R);
29819 RLo = DAG.getBitcast(ExtVT, RLo);
29823 SDValue MLo = getTargetVShiftByConstNode(X86OpcI, dl, ExtVT, RLo, 4, DAG);
29825 RLo = SignBitSelect(ExtVT, ALo, MLo, RLo);
29833 MLo = getTargetVShiftByConstNode(X86OpcI, dl, ExtVT, RLo, 2, DAG);
29835 RLo = SignBitSelect(ExtVT, ALo, MLo, RLo);
29843 MLo = getTargetVShiftByConstNode(X86OpcI, dl, ExtVT, RLo, 1, DAG);
29845 RLo = SignBitSelect(ExtVT, ALo, MLo, RLo);
29850 RLo = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ExtVT, RLo, 8, DAG);
29852 return DAG.getNode(X86ISD::PACKUS, dl, VT, RLo, RHi);
29861 SDValue RLo = getUnpackl(DAG, dl, VT, Z, R);
29865 RLo = DAG.getBitcast(ExtVT, RLo);
29867 SDValue Lo = DAG.getNode(Opc, dl, ExtVT, RLo, ALo);
30096 SDValue RLo = DAG.getBitcast(ExtVT, getUnpackl(DAG, DL, VT, Op1, Op0));
30100 SDValue Lo = DAG.getNode(ShiftOpc, DL, ExtVT, RLo, ALo);
30300 SDValue RLo = DAG.getBitcast(ExtVT, getUnpackl(DAG, DL, VT, R, R));
30304 SDValue Lo = DAG.getNode(ShiftOpc, DL, ExtVT, RLo, ALo);