Lines Matching defs:PVT
6784 EVT PVT = LD->getValueType(0);
6785 if (PVT != MVT::i32 && PVT != MVT::f32)
6836 EVT NVT = EVT::getVectorVT(*DAG.getContext(), PVT, NumElems);
7356 MVT PVT = TLI.getPointerTy(DAG.getDataLayout());
7362 SDValue CP = DAG.getConstantPool(C, PVT);
7378 SDValue VCP = DAG.getConstantPool(VecC, PVT);
14931 MVT PVT = VT.isFloatingPoint() ? MVT::v4f64 : MVT::v4i64;
14932 SDValue Flipped = DAG.getBitcast(PVT, V1);
14934 DAG.getVectorShuffle(PVT, DL, Flipped, DAG.getUNDEF(PVT), {2, 3, 0, 1});
35752 MVT PVT = getPointerTy(MF->getDataLayout());
35753 const TargetRegisterClass *PtrRC = getRegClassFor(PVT);
35755 unsigned XorRROpc = (PVT == MVT::i64) ? X86::XOR64rr : X86::XOR32rr;
35763 unsigned RdsspOpc = (PVT == MVT::i64) ? X86::RDSSPQ : X86::RDSSPD;
35767 unsigned PtrStoreOpc = (PVT == MVT::i64) ? X86::MOV64mr : X86::MOV32mr;
35769 const int64_t SSPOffset = 3 * PVT.getStoreSize();
35811 MVT PVT = getPointerTy(MF->getDataLayout());
35812 assert((PVT == MVT::i64 || PVT == MVT::i32) &&
35850 const int64_t LabelOffset = 1 * PVT.getStoreSize();
35856 PtrStoreOpc = (PVT == MVT::i64) ? X86::MOV64mr : X86::MOV32mr;
35857 const TargetRegisterClass *PtrRC = getRegClassFor(PVT);
35876 PtrStoreOpc = (PVT == MVT::i64) ? X86::MOV64mi32 : X86::MOV32mi;
35954 MVT PVT = getPointerTy(MF->getDataLayout());
35955 const TargetRegisterClass *PtrRC = getRegClassFor(PVT);
36008 if (PVT == MVT::i64) {
36019 unsigned RdsspOpc = (PVT == MVT::i64) ? X86::RDSSPQ : X86::RDSSPD;
36024 unsigned TestRROpc = (PVT == MVT::i64) ? X86::TEST64rr : X86::TEST32rr;
36036 unsigned PtrLoadOpc = (PVT == MVT::i64) ? X86::MOV64rm : X86::MOV32rm;
36037 const int64_t SPPOffset = 3 * PVT.getStoreSize();
36054 unsigned SubRROpc = (PVT == MVT::i64) ? X86::SUB64rr : X86::SUB32rr;
36067 unsigned ShrRIOpc = (PVT == MVT::i64) ? X86::SHR64ri : X86::SHR32ri;
36068 unsigned Offset = (PVT == MVT::i64) ? 3 : 2;
36075 unsigned IncsspOpc = (PVT == MVT::i64) ? X86::INCSSPQ : X86::INCSSPD;
36092 unsigned ShlR1Opc = (PVT == MVT::i64) ? X86::SHL64ri : X86::SHL32ri;
36100 unsigned MovRIOpc = (PVT == MVT::i64) ? X86::MOV64ri32 : X86::MOV32ri;
36119 unsigned DecROpc = (PVT == MVT::i64) ? X86::DEC64r : X86::DEC32r;
36144 MVT PVT = getPointerTy(MF->getDataLayout());
36145 assert((PVT == MVT::i64 || PVT == MVT::i32) &&
36149 (PVT == MVT::i64) ? &X86::GR64RegClass : &X86::GR32RegClass;
36153 Register FP = (PVT == MVT::i64) ? X86::RBP : X86::EBP;
36158 const int64_t LabelOffset = 1 * PVT.getStoreSize();
36159 const int64_t SPOffset = 2 * PVT.getStoreSize();
36161 unsigned PtrLoadOpc = (PVT == MVT::i64) ? X86::MOV64rm : X86::MOV32rm;
36162 unsigned IJmpOpc = (PVT == MVT::i64) ? X86::JMP64r : X86::JMP32r;
36224 MVT PVT = getPointerTy(MF->getDataLayout());
36225 assert((PVT == MVT::i64 || PVT == MVT::i32) && "Invalid Pointer Size!");
36234 Op = (PVT == MVT::i64) ? X86::MOV64mi32 : X86::MOV32mi;
36237 (PVT == MVT::i64) ? &X86::GR64RegClass : &X86::GR32RegClass;
36239 Op = (PVT == MVT::i64) ? X86::MOV64mr : X86::MOV32mr;
41003 MVT PVT = TLI.getPointerTy(DAG.getDataLayout());
41004 SDValue CP = DAG.getConstantPool(ConstantVector::get(ConstantVec), PVT);
56693 MVT PVT = TLI.getPointerTy(DAG.getDataLayout());
56694 SDValue CV = DAG.getConstantPool(C, PVT);
58042 bool X86TargetLowering::IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const {
58119 PVT = MVT::i32;