Lines Matching defs:DemandedElts
3656 APInt DemandedElts = APInt::getZero(NumElts);
3659 DemandedElts.setBit(M);
3660 return DemandedElts.isAllOnes();
5186 static void getPackDemandedElts(EVT VT, const APInt &DemandedElts,
5189 int NumElts = DemandedElts.getBitWidth();
5197 // Map DemandedElts to the packed operands.
5202 if (DemandedElts[OuterIdx])
5204 if (DemandedElts[OuterIdx + NumInnerEltsPerLane])
5211 static void getHorizDemandedElts(EVT VT, const APInt &DemandedElts,
5213 getHorizDemandedEltsForFirstOperand(VT.getSizeInBits(), DemandedElts,
5795 static bool getTargetShuffleInputs(SDValue Op, const APInt &DemandedElts,
5805 static bool getFauxShuffleMask(SDValue N, const APInt &DemandedElts,
5819 assert(NumElts == DemandedElts.getBitWidth() && "Unexpected vector size");
6092 getPackDemandedElts(VT, DemandedElts, EltsLHS, EltsRHS);
6241 DemandedElts.zextOrTrunc(SrcVT.getVectorNumElements());
6321 static bool getTargetShuffleInputs(SDValue Op, const APInt &DemandedElts,
6339 if (getFauxShuffleMask(Op, DemandedElts, Mask, Inputs, DAG, Depth,
6347 static bool getTargetShuffleInputs(SDValue Op, const APInt &DemandedElts,
6353 return getTargetShuffleInputs(Op, DemandedElts, Inputs, Mask, KnownUndef,
6366 APInt DemandedElts = APInt::getAllOnes(NumElts);
6367 return getTargetShuffleInputs(Op, DemandedElts, Inputs, Mask, DAG, Depth,
8214 APInt DemandedElts = APInt::getAllOnes(NumElts);
8217 DemandedElts.clearBit(i);
8221 if (VT.is256BitVector() && DemandedElts.lshr(HalfNumElts) == 0) {
17990 APInt DemandedElts = APInt::getZero(NumElts);
17997 DemandedElts.setAllBits();
17998 return DemandedElts;
18000 DemandedElts.setBit(User->getConstantOperandVal(1));
18005 DemandedElts.setAllBits();
18006 return DemandedElts;
18009 DemandedElts |= APIntOps::ScaleBitMask(DemandedSrcElts, NumElts);
18013 DemandedElts.setAllBits();
18014 return DemandedElts;
18017 return DemandedElts;
18115 APInt DemandedElts = getExtractedDemandedElts(Vec.getNode());
18116 assert(DemandedElts.getBitWidth() == 16 && "Vector width mismatch");
18120 if (DWordIdx == 0 && DemandedElts == (DemandedElts & 15)) {
18132 if (DemandedElts == (DemandedElts & (3 << (WordIdx * 2)))) {
24499 APInt DemandedElts = APInt::getLowBitsSet(InNumElts, NumElts);
24500 if (DAG.ComputeNumSignBits(In, DemandedElts) == InVT.getScalarSizeInBits()) {
37016 const APInt &DemandedElts,
37030 if (!DemandedElts[i] || V.getOperand(i).isUndef())
37107 const APInt &DemandedElts,
37111 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedElts, NumSrcElts);
37127 const APInt &DemandedElts,
37133 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedElts, NumSrcElts);
37150 const APInt &DemandedElts,
37157 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedElts, NumSrcElts);
37172 const SDValue Op, const APInt &DemandedElts, unsigned Depth,
37178 DemandedElts, DemandedEltsLHS,
37199 const APInt &DemandedElts,
37203 unsigned NumElts = DemandedElts.getBitWidth();
37218 Known = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
37219 Known2 = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
37257 Known = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
37277 getPackDemandedElts(VT, DemandedElts, DemandedLHS, DemandedRHS);
37305 KnownBits KnownIdx = DAG.computeKnownBits(Idx, DemandedElts, Depth + 1);
37321 Known = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
37322 Known2 = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
37329 Known = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
37330 Known2 = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
37339 Known = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
37340 Known2 = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
37352 computeKnownBitsForPSADBW(LHS, RHS, Known, DemandedElts, DAG, Depth);
37358 DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
37360 DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
37379 computeKnownBitsForPMADDWD(LHS, RHS, Known, DemandedElts, DAG, Depth);
37389 computeKnownBitsForPMADDUBSW(LHS, RHS, Known, DemandedElts, DAG, Depth);
37394 Known = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
37395 Known2 = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
37438 Known = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
37439 Known2 = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
37448 Known = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
37478 if (NumElts > NumSrcElts && DemandedElts.countr_zero() >= NumSrcElts)
37493 if (NumElts > NumSrcElts && DemandedElts.countr_zero() >= NumSrcElts)
37500 if (DemandedElts.countr_zero() >= (NumElts / 2))
37513 if (!DemandedElts[I])
37529 Op, DemandedElts, Depth, DAG,
37548 computeKnownBitsForPMADDWD(LHS, RHS, Known, DemandedElts, DAG, Depth);
37560 computeKnownBitsForPMADDUBSW(LHS, RHS, Known, DemandedElts, DAG, Depth);
37572 computeKnownBitsForPSADBW(LHS, RHS, Known, DemandedElts, DAG, Depth);
37592 if (!DemandedElts[i])
37631 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
37646 APInt DemandedSrc = DemandedElts.zextOrTrunc(SrcVT.getVectorNumElements());
37656 getPackDemandedElts(Op.getValueType(), DemandedElts, DemandedLHS,
37701 unsigned Tmp = DAG.ComputeNumSignBits(Src, DemandedElts, Depth + 1);
37712 unsigned Tmp = DAG.ComputeNumSignBits(Src, DemandedElts, Depth + 1);
37720 ((VT == MVT::v4f32 || VT == MVT::v2f64) && DemandedElts == 1))
37734 DAG.ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth + 1);
37737 DAG.ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth + 1);
37760 if (!DemandedElts[i])
40378 const APInt &DemandedElts, SelectionDAG &DAG,
40402 if (!getShuffleDemandedElts(NumElts, BlendMask, DemandedElts, Demanded0,
41798 APInt DemandedElts = APInt::getAllOnes(VT.getVectorNumElements());
41799 if (TLI.SimplifyDemandedVectorElts(Op, DemandedElts, DCI))
41816 SDValue Op, const APInt &DemandedElts, unsigned MaskIndex,
41819 unsigned NumElts = DemandedElts.getBitWidth();
41820 if (DemandedElts.isAllOnes())
41829 if (SimplifyDemandedVectorElts(Mask, DemandedElts, MaskUndef, MaskZero, TLO,
41861 if (!DemandedElts[i / Scale] && !isa<UndefValue>(Elt)) {
41883 SDValue Op, const APInt &DemandedElts, APInt &KnownUndef, APInt &KnownZero,
41885 int NumElts = DemandedElts.getBitWidth();
41897 if (SimplifyDemandedVectorElts(LHS, DemandedElts, LHSUndef, LHSZero, TLO,
41900 if (SimplifyDemandedVectorElts(RHS, DemandedElts, RHSUndef, RHSZero, TLO,
41913 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedElts, 2 * NumElts);
41944 if (!DemandedElts.isAllOnes()) {
41946 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedElts, NumSrcElts);
41990 if (SimplifyDemandedVectorElts(Src, DemandedElts, SrcUndef, KnownZero, TLO,
41995 if (DemandedElts.isSubsetOf(KnownZero))
42000 if (!DemandedElts.isAllOnes())
42002 Src, DemandedElts, TLO.DAG, Depth + 1))
42016 if (SimplifyDemandedVectorElts(LHS, DemandedElts, LHSUndef, LHSZero, TLO,
42021 if (DemandedElts.isSubsetOf(LHSZero))
42025 if (SimplifyDemandedVectorElts(RHS, DemandedElts, RHSUndef, RHSZero, TLO,
42038 if (SimplifyDemandedVectorElts(LHS, DemandedElts, LHSUndef, LHSZero, TLO,
42041 if (SimplifyDemandedVectorElts(RHS, DemandedElts, RHSUndef, RHSZero, TLO,
42059 if (!DemandedElts.intersects(APInt::getLowBitsSet(NumElts, ShiftAmt))) {
42075 APInt DemandedSrc = DemandedElts.lshr(ShiftAmt);
42098 if (!DemandedElts.intersects(APInt::getHighBitsSet(NumElts, ShiftAmt))) {
42114 APInt DemandedSrc = DemandedElts.shl(ShiftAmt);
42135 APInt OpElts = DemandedElts;
42141 if (!DemandedElts[I])
42171 if (!DemandedElts.isAllOnes()) {
42192 APInt SrcElts = DemandedElts.zextOrTrunc(SrcVT.getVectorNumElements());
42204 getPackDemandedElts(VT, DemandedElts, DemandedLHS, DemandedRHS);
42219 if (!DemandedElts.isAllOnes()) {
42241 getHorizDemandedElts(VT, DemandedElts, DemandedLHS, DemandedRHS);
42256 if (N0 != N1 && !DemandedElts.isAllOnes()) {
42275 APInt DemandedSrc = DemandedElts.zextOrTrunc(SrcVT.getVectorNumElements());
42289 DemandedElts, TLO.DAG, Subtarget, SDLoc(Op)))
42295 if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedElts, SelUndef,
42299 // TODO: Use SelZero to adjust LHS/RHS DemandedElts.
42301 if (SimplifyDemandedVectorElts(Op.getOperand(1), DemandedElts, LHSUndef,
42306 if (SimplifyDemandedVectorElts(Op.getOperand(2), DemandedElts, RHSUndef,
42317 APInt DemandedUpperElts = DemandedElts;
42327 if (DemandedElts == 1 && Op.getValue(1).use_empty() && isTypeLegal(SVT)) {
42343 if (DemandedElts == 1) {
42362 if (SimplifyDemandedVectorEltsForTargetShuffle(Op, DemandedElts, 0, TLO,
42369 if (SimplifyDemandedVectorEltsForTargetShuffle(Op, DemandedElts, 1, TLO,
42375 if (SimplifyDemandedVectorEltsForTargetShuffle(Op, DemandedElts, 2, TLO,
42385 DemandedElts.lshr(NumElts / 2) == 0) {
42390 if (VT.is512BitVector() && DemandedElts.lshr(NumElts / 4) == 0)
42559 if (!DemandedElts.isOne() && TLO.DAG.isSplatValue(Op, /*AllowUndefs*/false))
42566 if (!getTargetShuffleInputs(Op, DemandedElts, OpInputs, OpMask, OpUndef,
42584 if (!DemandedElts[i])
42609 if (DemandedElts[i]) {
42629 if (!DemandedElts.isAllOnes()) {
42634 if (DemandedElts[i])
42664 APInt DemandedElts = OriginalDemandedElts.trunc(SrcVT.getVectorNumElements());
42665 if (SimplifyDemandedBits(Src, TruncMask, DemandedElts, KnownOp, TLO, Depth + 1))
42976 APInt DemandedElts = APInt::getOneBitSet(
42978 if (SimplifyDemandedBits(Src, OriginalDemandedBits, DemandedElts, Known,
43023 APInt DemandedElts = OriginalDemandedBits.zextOrTrunc(NumElts);
43024 if (SimplifyDemandedVectorElts(Src, DemandedElts, KnownUndef, KnownZero,
43034 if (SimplifyDemandedBits(Src, DemandedSrcBits, DemandedElts, KnownSrc, TLO,
43045 Src, DemandedSrcBits, DemandedElts, TLO.DAG, Depth + 1))
43164 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
43166 int NumElts = DemandedElts.getBitWidth();
43178 !DemandedElts[CIdx->getZExtValue()])
43188 unsigned NumSignBits = DAG.ComputeNumSignBits(Op0, DemandedElts, Depth + 1);
43213 KnownBits CondKnown = DAG.computeKnownBits(Cond, DemandedElts, Depth + 1);
43225 KnownBits LHSKnown = DAG.computeKnownBits(LHS, DemandedElts, Depth + 1);
43226 KnownBits RHSKnown = DAG.computeKnownBits(RHS, DemandedElts, Depth + 1);
43240 if (getTargetShuffleInputs(Op, DemandedElts, ShuffleOps, ShuffleMask,
43250 if (DemandedElts.isSubsetOf(ShuffleUndef))
43252 if (DemandedElts.isSubsetOf(ShuffleUndef | ShuffleZero))
43259 if (!DemandedElts[i] || ShuffleUndef[i])
43280 Op, DemandedBits, DemandedElts, DAG, Depth);
43284 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
43286 unsigned NumElts = DemandedElts.getBitWidth();
43297 if (!DemandedElts[M.index()] || M.value() == SM_SentinelZero)
43316 Op, DemandedElts, DAG, PoisonOnly, Depth);
43320 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
43339 Op, DemandedElts, DAG, PoisonOnly, ConsiderFlags, Depth);
43343 const APInt &DemandedElts,
43347 unsigned NumElts = DemandedElts.getBitWidth();
43357 return TargetLowering::isSplatValueForTargetNode(Op, DemandedElts, UndefElts,
48682 APInt DemandedElts = APInt::getAllOnes(VT.getVectorNumElements());
48683 if (TLI.SimplifyDemandedVectorElts(SDValue(N, 0), DemandedElts, DCI))
50031 APInt DemandedElts = APInt::getAllOnes(NumElts);
50035 DemandedElts.clearAllBits();
50041 DemandedElts.setBit(I);
50044 DemandedElts.setBit(I);
50048 return std::make_pair(DemandedBits, DemandedElts);
50816 APInt DemandedElts = APInt::getZero(NumElts);
50819 DemandedElts.setBit(I);
50821 return TLI.SimplifyDemandedVectorElts(OtherOp, DemandedElts, DCI);
51884 APInt DemandedElts = APInt::getLowBitsSet(VT.getVectorNumElements(), StElts);
51887 if (TLI.SimplifyDemandedVectorElts(StoredVal, DemandedElts, DCI)) {
53396 APInt DemandedElts = APInt::getAllOnes(VT.getVectorNumElements());
53397 if (TLI.SimplifyDemandedVectorElts(SDValue(N, 0), DemandedElts, DCI))
53540 APInt DemandedElts = APInt::getAllOnes(NumElts);
53544 DemandedElts.clearAllBits();
53550 DemandedElts.setBit(I);
53554 DemandedElts.setBit(I);
53558 return std::make_pair(DemandedBits, DemandedElts);
53602 APInt DemandedElts = APInt::getLowBitsSet(8, 4);
53603 if (TLI.SimplifyDemandedVectorElts(Src, DemandedElts, DCI)) {
57375 APInt DemandedElts = APInt::getAllOnes(VT.getVectorNumElements());
57376 if (TLI.SimplifyDemandedVectorElts(SDValue(N, 0), DemandedElts, DCI))
57458 APInt DemandedElts = APInt::getAllOnes(VT.getVectorNumElements());
57459 if (TLI.SimplifyDemandedVectorElts(SDValue(N, 0), DemandedElts, DCI))