Lines Matching defs:Convert

8091   // Convert to blend(fsub,fadd).
8301       // Convert this build_vector into a pair of horizontal binops followed by
8337     // Convert this build_vector into two horizontal add/sub followed by
21362       // Convert clamped value to integer.
21376     // Convert clamped value to integer.
22394       // Convert to a ICMP_EQ(XOR(LHS,RHS),0) pattern.
24094         // Convert to vectors, do a VSELECT, and convert back to scalar.
24168       // Convert the carry flag to a -1/0 mask with sbb:
26545   // one with vXi1 mask. Convert scalar to vXi1 if necessary.
26582   // one with vXi1 mask. Convert scalar to vXi1 if necessary.
29407 // Convert a shift/rotate left amount to a multiplication scale factor.
31811   // Convert seq_cst store -> xchg
31812   // Convert wide store -> swap (-> cmpxchg8b/cmpxchg16b)
43618 // Convert a vXi1 constant build vector to the same width scalar integer.
43715   // Convert build vector ops to MMX data in the bottom elements.
44102   // Convert a bitcasted integer logic operation that has one bitcasted
45216     // Convert extract_element(bitcast(<X x i1>) -> bitcast(extract_subvector()).
45356 // Convert (vXiY *ext(vXi1 bitcast(iX))) to extend_in_reg(broadcast(iX)).
45889   // Convert vselects with constant condition into shuffles.
47777       // Convert sext(vXi16) to zext(vXi16).
47780       // Convert sext(vXi8) to zext(vXi16 sext(vXi8)) on pre-SSE41 targets
47788     // Convert SIGN_EXTEND_VECTOR_INREG to ZEXT_EXTEND_VECTOR_INREG.
47795     // Convert VSRAI(Op, 16) to VSRLI(Op, 16).
49245   // Convert scalar FP compares and logic to vector compares (COMIS* to CMPS*)
51450   // Convert a masked load with a constant mask into a masked load and a select.
51611   // Convert a store of vXi1 into a store of iX and a bitcast.
53137   // Convert a (iX bitreverse(bitcast(vXi1 X))) -> (iX bitcast(shuffle(X)))
53400   // Convert a full vector load into vzload when not all bits are needed.
53412       SDValue Convert = DAG.getNode(N->getOpcode(), dl, VT,
53414       DCI.CombineTo(N, Convert);
53429   // Convert a full vector load into vzload when not all bits are needed.
53442         SDValue Convert =
53445         DCI.CombineTo(N, Convert, Convert.getValue(1));
53447         SDValue Convert =
53449         DCI.CombineTo(N, Convert);
53609     // Convert a full vector load into vzload when not all bits are needed.
53615           SDValue Convert = DAG.getNode(
53618           DCI.CombineTo(N, Convert, Convert.getValue(1));
53620           SDValue Convert = DAG.getNode(N->getOpcode(), dl, MVT::v4f32,
53622           DCI.CombineTo(N, Convert);
55881   // Convert sub to add.
57538   // Convert the input to vXi16.