Lines Matching defs:CMOV
22950 // Only perform this transform if CMOV is supported otherwise the select
24324 SDValue Cmov = DAG.getNode(X86ISD::CMOV, DL, T1.getValueType(), T2, T1,
24330 // Or finally, promote i8 cmovs if we have CMOV,
24332 // FIXME: we should not limit promotion of i8 case to only when the CMOV is
24334 // being inserted between two CMOV's. (in i16 case too TBN)
24342 SDValue Cmov = DAG.getNode(X86ISD::CMOV, DL, MVT::i32, Ops);
24346 // X86ISD::CMOV means set the result (which is operand 1) to the RHS if
24349 return DAG.getNode(X86ISD::CMOV, DL, Op.getValueType(), Ops, Op->getFlags());
27149 SDValue isValid = DAG.getNode(X86ISD::CMOV, dl, Op->getValueType(1), Ops);
28081 Op = DAG.getNode(X86ISD::CMOV, dl, OpVT, Ops);
28107 // If src is known never zero we can skip the CMOV.
28115 return DAG.getNode(X86ISD::CMOV, dl, VT, Ops);
28211 // Since X86 does not have CMOV for 8-bit integer, we don't convert
28212 // 8-bit integer abs to NEG and CMOV.
28218 return DAG.getNode(X86ISD::CMOV, DL, VT, Ops);
33695 NODE_NAME_CASE(CMOV)
34839 // Return true if it is OK for this CMOV pseudo-opcode to be cascaded
34840 // together with other CMOV pseudo-opcodes into a single basic-block with
34908 // If this CMOV we are generating is the opposite condition from
35011 // We lower cascaded CMOV into two successive branches to the same block.
35024 // For a cascaded CMOV, we lower it to two successive branches to
35078 // FirstInsertedMBB (the True operand of the SELECT_CC/CMOV nodes).
35106 // This code lowers all pseudo-CMOV instructions. Generally it lowers these
35108 // point to select the true and false operands of the CMOV in the PHI.
35110 // The code also handles two different cases of multiple CMOV opcodes
35120 // t2 = CMOV cond1 t1, f1
35121 // t3 = CMOV cond1 t2, f2
35138 // CMOV ((CMOV F, T, cc1), T, cc2) is checked here and handled by a separate
35147 // first. Of the two cases of multiple CMOV lowerings, case 1 reduces the
35194 // Transfer any debug instructions inside the CMOV sequence to the sunk block.
35225 // Now remove the CMOV(s).
37402 case X86ISD::CMOV: {
37741 case X86ISD::CMOV: {
43066 case X86ISD::CMOV: {
45640 // without that, the sequence should be cheaper than a CMOV alternative.
46322 // to integer and use an integer select which will be converted to a CMOV.
46597 // where Op could be BRCOND or CMOV.
46669 case X86ISD::CMOV: {
47238 /// Optimize X86ISD::CMOV [LHS, RHS, CONDCODE (e.g. X86::COND_NE), CONDVAL]
47262 return DAG.getNode(X86ISD::CMOV, DL, N->getValueType(0), Ops);
47354 // of CMOV and CMP.
47383 return DAG.getNode(X86ISD::CMOV, DL, N->getValueType(0), Ops);
47414 // Fold and/or of setcc's to double CMOV:
47415 // (CMOV F, T, ((cc1 | cc2) != 0)) -> (CMOV (CMOV F, T, cc1), T, cc2)
47416 // (CMOV F, T, ((cc1 & cc2) != 0)) -> (CMOV (CMOV T, F, !cc1), F, !cc2)
47419 // cmovcc1 (jcc1 if we don't have CMOV)
47425 // cmovne (jne if we don't have CMOV)
47426 // When we can't use the CMOV instruction, it might increase branch
47428 // When we can use CMOV, or when there is no mispredict, this improves
47444 SDValue LCMOV = DAG.getNode(X86ISD::CMOV, DL, N->getValueType(0), LOps);
47447 SDValue CMOV = DAG.getNode(X86ISD::CMOV, DL, N->getValueType(0), Ops);
47448 return CMOV;
47452 // Fold (CMOV C1, (ADD (CTTZ X), C2), (X != 0)) ->
47453 // (ADD (CMOV C1-C2, (CTTZ X), (X != 0)), C2)
47454 // Or (CMOV (ADD (CTTZ X), C2), C1, (X == 0)) ->
47455 // (ADD (CMOV (CTTZ X), C1-C2, (X == 0)), C2)
47479 DAG.getNode(X86ISD::CMOV, DL, VT, Diff, Add.getOperand(0),
53657 if (N0.getOpcode() != X86ISD::CMOV || !N0.hasOneUse())
53681 // We do not want i16 CMOV's. Promote to i32 and truncate afterwards.
53688 SDValue CMov = DAG.getNode(X86ISD::CMOV, DL, CMovVT, CMovOp0, CMovOp1,
53807 // If we face {ANY,SIGN,ZERO}_EXTEND that is applied to a CMOV with constant
53808 // operands and the result of CMOV is not used anywhere else - promote CMOV
53812 // getting rid of result extension code after CMOV will help that.
53813 // 2) Promotion of constant CMOV arguments is free, hence the
53815 // 3) 16-bit CMOV encoding is 4 bytes, 32-bit CMOV is 3-byte, so this
53817 // (64-bit CMOV is 4-bytes, that's why we don't do 32-bit => 64-bit
53821 if (CMovN.getOpcode() != X86ISD::CMOV || !CMovN.hasOneUse())
53854 SDValue Res = DAG.getNode(X86ISD::CMOV, DL, ExtendVT, CMovOp0, CMovOp1,
55100 case X86ISD::CMOV:
55135 case X86ISD::CMOV:
55706 /// CMOV of constants requires materializing constant operands in registers.
55708 /// count. We do this with CMOV rather the generic 'select' because there are
55719 if (V.getOpcode() != X86ISD::CMOV || !V.hasOneUse())
55729 // Match an appropriate CMOV as the first operand of the add.
55763 Cmov = DAG.getNode(X86ISD::CMOV, DL, VT, FalseOp, TrueOp,
55771 return DAG.getNode(X86ISD::CMOV, DL, VT, FalseOp, TrueOp, Cmov.getOperand(2),
55852 if (N1.getOpcode() != X86ISD::CMOV || !N1.hasOneUse())
55876 // Build a new CMOV with the operands swapped.
55879 SDValue Cmov = DAG.getNode(X86ISD::CMOV, DL, VT, TrueOp, FalseOp,
57767 case X86ISD::CMOV: return combineCMov(N, DAG, DCI, Subtarget);