Lines Matching defs:CC0
23319 unsigned CC0, CC1;
23322 CC0 = 3; // UNORD
23327 CC0 = 7; // ORD
23336 {Chain, Op0, Op1, DAG.getTargetConstant(CC0, dl, MVT::i8)});
23344 Opc, dl, VT, Op0, Op1, DAG.getTargetConstant(CC0, dl, MVT::i8));
46195 // Similar to DAGCombine's select(or(CC0,CC1),X,Y) fold but for legal types.
46717 static bool checkBoolTestAndOrSetCCCombine(SDValue Cond, X86::CondCode &CC0,
46749 CC0 = (X86::CondCode)SetCC0->getConstantOperandVal(0);
47433 X86::CondCode CC0, CC1;
47435 if (checkBoolTestAndOrSetCCCombine(Cond, CC0, CC1, Flags, isAndSetCC)) {
47438 CC0 = X86::GetOppositeBranchCondition(CC0);
47443 DAG.getTargetConstant(CC0, DL, MVT::i8), Flags};
49236 ISD::CondCode CC0 = cast<CondCodeSDNode>(N0.getOperand(2))->get();
49242 !(cheapX86FSETCC_SSE(CC0) && cheapX86FSETCC_SSE(CC1)))
49259 SDValue Setcc0 = DAG.getSetCC(DL, BoolVecVT, Vec00, Vec01, CC0);
49813 X86::CondCode CC0 =
49816 if (CC0 == X86::COND_P || CC0 == X86::COND_NP)
49822 // evaluates to true. So we need to inverse CC0 as SrcCC when the logic
49825 IsOR ? DAG.getTargetConstant(X86::GetOppositeBranchCondition(CC0),