Lines Matching defs:IsLP64
57 IsLP64 = STI.isTarget64BitLP64();
109 static unsigned getSUBriOpcode(bool IsLP64) {
110 return IsLP64 ? X86::SUB64ri32 : X86::SUB32ri;
113 static unsigned getADDriOpcode(bool IsLP64) {
114 return IsLP64 ? X86::ADD64ri32 : X86::ADD32ri;
117 static unsigned getSUBrrOpcode(bool IsLP64) {
118 return IsLP64 ? X86::SUB64rr : X86::SUB32rr;
121 static unsigned getADDrrOpcode(bool IsLP64) {
122 return IsLP64 ? X86::ADD64rr : X86::ADD32rr;
125 static unsigned getANDriOpcode(bool IsLP64, int64_t Imm) {
126 return IsLP64 ? X86::AND64ri32 : X86::AND32ri;
129 static unsigned getLEArOpcode(bool IsLP64) {
130 return IsLP64 ? X86::LEA64r : X86::LEA32r;
3166 static unsigned GetScratchRegister(bool Is64Bit, bool IsLP64,
3179 if (IsLP64)
3215 unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
3252 allocMBB->addLiveIn(IsLP64 ? X86::R10 : X86::R10D);
3265 TlsOffset = IsLP64 ? 0x70 : 0x40;
3283 ScratchReg = IsLP64 ? X86::RSP : X86::ESP;
3285 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r),
3293 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm))
3345 ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, true);
3349 ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, false);
3391 const unsigned RegAX = IsLP64 ? X86::RAX : X86::EAX;
3392 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D;
3393 const unsigned Reg11 = IsLP64 ? X86::R11 : X86::R11D;
3394 const unsigned MOVrr = IsLP64 ? X86::MOV64rr : X86::MOV32rr;
3399 BuildMI(allocMBB, DL, TII.get(getMOVriOpcode(IsLP64, StackSize)), Reg10)
3402 TII.get(getMOVriOpcode(IsLP64, X86FI->getArgumentStackSize())),
3617 ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);