Lines Matching defs:FramePtr

470   const Register FramePtr = TRI->getFrameRegister(MF);
472 STI.isTarget64BitILP32() ? Register(getX86SubSuperRegister(FramePtr, 64))
473 : FramePtr;
512 Register FramePtr = TRI->getFrameRegister(MF);
515 ? Register(getX86SubSuperRegister(FramePtr, 64))
516 : FramePtr;
536 Register FramePtr = TRI->getFrameRegister(MF);
539 ? Register(getX86SubSuperRegister(FramePtr, 64))
540 : FramePtr;
1551 Register FramePtr = TRI->getFrameRegister(MF);
1553 STI.isTarget64BitILP32() ? Register(getX86SubSuperRegister(FramePtr, 64))
1554 : FramePtr;
1754 // Change the rule for the FramePtr to be an "offset" rule.
1766 .addImm(FramePtr)
1801 BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr)
1819 FramePtr)
1849 // .cv_fpo_setframe $FramePtr
1852 .addImm(FramePtr)
2057 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr),
2060 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr)
2068 .addImm(FramePtr)
2164 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), FramePtr, true,
2182 .addReg(FramePtr)
2353 Register FramePtr = TRI->getFrameRegister(MF);
2355 Is64BitILP32 ? Register(getX86SubSuperRegister(FramePtr, 64)) : FramePtr;
2517 // - lea SEHAllocationSize(%FramePtr), %rsp
2519 // 'mov %FramePtr, %rsp' will not be recognized as an epilogue sequence.
2524 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr), FramePtr,
2529 BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr).addReg(FramePtr);
3903 Register FramePtr = TRI->getFrameRegister(MF);
3926 if (UsedReg == FramePtr) {
3929 BuildMI(MBB, MBBI, DL, TII.get(ADDri), FramePtr)
3930 .addReg(FramePtr)
3940 FramePtr, false, EndOffset)
3948 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), FramePtr),
3952 llvm_unreachable("32-bit frames with WinEH must use FramePtr or BasePtr");