Lines Matching defs:RetVT
110 bool X86FastEmitCMoveSelect(MVT RetVT, const Instruction *I);
112 bool X86FastEmitSSESelect(MVT RetVT, const Instruction *I);
114 bool X86FastEmitPseudoSelect(MVT RetVT, const Instruction *I);
235 MVT RetVT;
239 if (!isTypeLegal(RetTy, RetVT))
242 if (RetVT != MVT::i32 && RetVT != MVT::i64)
2024 bool X86FastISel::X86FastEmitCMoveSelect(MVT RetVT, const Instruction *I) {
2030 if (RetVT < MVT::i16 || RetVT > MVT::i64)
2034 const TargetRegisterClass *RC = TLI.getRegClassFor(RetVT);
2150 bool X86FastISel::X86FastEmitSSESelect(MVT RetVT, const Instruction *I) {
2159 !((Subtarget->hasSSE1() && RetVT == MVT::f32) ||
2160 (Subtarget->hasSSE2() && RetVT == MVT::f64)))
2195 const TargetRegisterClass *RC = TLI.getRegClassFor(RetVT);
2204 (RetVT == MVT::f32) ? X86::VCMPSSZrri : X86::VCMPSDZrri;
2217 (RetVT == MVT::f32) ? X86::VMOVSSZrrk : X86::VMOVSDZrrk;
2234 (RetVT == MVT::f32) ? X86::VCMPSSrri : X86::VCMPSDrri;
2236 (RetVT == MVT::f32) ? X86::VBLENDVPSrrr : X86::VBLENDVPDrrr;
2253 switch (RetVT.SimpleTy) {
2272 bool X86FastISel::X86FastEmitPseudoSelect(MVT RetVT, const Instruction *I) {
2276 switch (RetVT.SimpleTy) {
2338 const TargetRegisterClass *RC = TLI.getRegClassFor(RetVT);
2347 MVT RetVT;
2348 if (!isTypeLegal(I->getType(), RetVT))
2365 const TargetRegisterClass *RC = TLI.getRegClassFor(RetVT);
2376 if (X86FastEmitCMoveSelect(RetVT, I))
2380 if (X86FastEmitSSESelect(RetVT, I))
2385 if (X86FastEmitPseudoSelect(RetVT, I))