Lines Matching defs:IndexReg

212 /// IndexReg field of the addressing mode will be updated to match in this case.
217   AM.IndexReg = constrainOperandRegClass(MIB->getDesc(), AM.IndexReg,
734         (AM.Base.Reg == 0 && AM.IndexReg == 0)) {
753           assert(AM.Base.Reg == 0 && AM.IndexReg == 0);
816     if (AM.IndexReg == 0) {
818       AM.IndexReg = getRegForValue(V);
819       return AM.IndexReg != 0;
903     unsigned IndexReg = AM.IndexReg;
937         if (IndexReg == 0 &&
942           IndexReg = getRegForGEPIndex(PtrVT, Op);
943           if (IndexReg == 0)
956     AM.IndexReg = IndexReg;
1060         (AM.Base.Reg != 0 || AM.IndexReg != 0))
1077       assert(AM.Base.Reg == 0 && AM.IndexReg == 0);
1114     if (AM.IndexReg == 0) {
1116       AM.IndexReg = GetCallRegForValue(V);
1117       return AM.IndexReg != 0;
3862         AM.IndexReg == 0 && AM.Disp == 0 && AM.GV == nullptr)
4020     if (!MO.isReg() || MO.isDef() || MO.getReg() != AM.IndexReg)
4023     Register IndexReg = constrainOperandRegClass(Result->getDesc(),
4025     if (IndexReg == MO.getReg())
4027     MO.setReg(IndexReg);