Lines Matching defs:CondReg
2106 // Selects operate on i1, however, CondReg is 8 bits width and may contain
2111 Register CondReg = getRegForValue(Cond);
2112 if (CondReg == 0)
2116 if (MRI.getRegClass(CondReg) == &X86::VK1RegClass) {
2117 unsigned KCondReg = CondReg;
2118 CondReg = createResultReg(&X86::GR32RegClass);
2120 TII.get(TargetOpcode::COPY), CondReg)
2122 CondReg = fastEmitInst_extractsubreg(MVT::i8, CondReg, X86::sub_8bit);
2125 .addReg(CondReg)
2312 Register CondReg = getRegForValue(Cond);
2313 if (CondReg == 0)
2317 if (MRI.getRegClass(CondReg) == &X86::VK1RegClass) {
2318 unsigned KCondReg = CondReg;
2319 CondReg = createResultReg(&X86::GR32RegClass);
2321 TII.get(TargetOpcode::COPY), CondReg)
2323 CondReg = fastEmitInst_extractsubreg(MVT::i8, CondReg, X86::sub_8bit);
2326 .addReg(CondReg)