Lines Matching refs:MBBI
65 MachineBasicBlock::iterator MBBI);
67 MachineBasicBlock::iterator MBBI);
68 bool expandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
91 MachineBasicBlock *MBB, MachineBasicBlock::iterator MBBI) {
93 MachineInstr *JTInst = &*MBBI;
107 BuildMI(*MBB, MBBI, DL, TII->get(X86::LEA64r), X86::R11)
114 BuildMI(*MBB, MBBI, DL, TII->get(X86::CMP64rr))
128 BuildMI(*MBB, MBBI, DL, TII->get(X86::JCC_1)).addMBB(ThenMBB).addImm(CC);
133 MBBI = MBB->end();
143 BuildMI(*MBB, MBBI, DL, TII->get(X86::TAILJMPd64))
178 MBBI = MBB->end();
192 MachineBasicBlock::iterator MBBI) {
195 MachineInstr &MI = *MBBI;
210 OriginalCall = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)).getInstr();
230 auto *Marker = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(X86::MOV64rr))
241 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(X86::CALL64pcrel32))
259 /// If \p MBBI is a pseudo instruction, this method expands
261 /// \returns true if \p MBBI has been expanded.
263 MachineBasicBlock::iterator MBBI) {
264 MachineInstr &MI = *MBBI;
266 const DebugLoc &DL = MBBI->getDebugLoc();
280 MachineOperand &JumpTarget = MBBI->getOperand(0);
281 MachineOperand &StackAdjust = MBBI->getOperand(isMem ? X86::AddrNumOperands
301 Offset += X86FL->mergeSPUpdates(MBB, MBBI, true);
302 X86FL->emitSPUpdate(MBB, MBBI, DL, Offset, /*InEpilogue=*/true);
329 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op));
339 MIB.addImm(MBBI->getOperand(2).getImm());
346 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op));
348 MIB.add(MBBI->getOperand(i));
351 BuildMI(MBB, MBBI, DL,
356 BuildMI(MBB, MBBI, DL, TII->get(X86::TAILJMPr))
360 MachineInstr &NewMI = *std::prev(MBBI);
361 NewMI.copyImplicitOps(*MBBI->getParent()->getParent(), *MBBI);
365 if (MBBI->isCandidateForCallSiteEntry())
366 MBB.getParent()->moveCallSiteInfo(&*MBBI, &NewMI);
369 MBB.erase(MBBI);
375 MachineOperand &DestAddr = MBBI->getOperand(0);
380 BuildMI(MBB, MBBI, DL,
388 int64_t StackAdj = MBBI->getOperand(0).getImm();
389 X86FL->emitSPUpdate(MBB, MBBI, DL, StackAdj, true);
396 BuildMI(MBB, MBBI, DL, TII->get(RetOp));
397 MBB.erase(MBBI);
402 int64_t StackAdj = MBBI->getOperand(0).getImm();
405 MIB = BuildMI(MBB, MBBI, DL,
408 MIB = BuildMI(MBB, MBBI, DL,
416 BuildMI(MBB, MBBI, DL, TII->get(X86::POP32r)).addReg(X86::ECX, RegState::Define);
417 X86FL->emitSPUpdate(MBB, MBBI, DL, StackAdj, /*InEpilogue=*/true);
418 BuildMI(MBB, MBBI, DL, TII->get(X86::PUSH32r)).addReg(X86::ECX);
419 MIB = BuildMI(MBB, MBBI, DL, TII->get(X86::RET32));
421 for (unsigned I = 1, E = MBBI->getNumOperands(); I != E; ++I)
422 MIB.add(MBBI->getOperand(I));
423 MBB.erase(MBBI);
433 const MachineOperand &InArg = MBBI->getOperand(6);
434 Register SaveRbx = MBBI->getOperand(7).getReg();
440 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, InArg.getReg(), false);
442 MachineInstr *NewInstr = BuildMI(MBB, MBBI, DL, TII->get(X86::LCMPXCHG16B));
445 NewInstr->addOperand(MBBI->getOperand(Idx));
447 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, SaveRbx,
451 MBBI->eraseFromParent();
463 int64_t Disp = MBBI->getOperand(1 + X86::AddrDisp).getImm();
465 Register Reg = MBBI->getOperand(0).getReg();
466 bool DstIsDead = MBBI->getOperand(0).isDead();
471 BuildMI(MBB, MBBI, DL, TII->get(GET_EGPR_IF_ENABLED(X86::KMOVWkm)))
474 BuildMI(MBB, MBBI, DL, TII->get(GET_EGPR_IF_ENABLED(X86::KMOVWkm)))
478 MIBLo.add(MBBI->getOperand(1 + i));
482 MIBHi.add(MBBI->getOperand(1 + i));
486 MachineMemOperand *OldMMO = MBBI->memoperands().front();
495 MBB.erase(MBBI);
499 int64_t Disp = MBBI->getOperand(X86::AddrDisp).getImm();
501 Register Reg = MBBI->getOperand(X86::AddrNumOperands).getReg();
502 bool SrcIsKill = MBBI->getOperand(X86::AddrNumOperands).isKill();
507 BuildMI(MBB, MBBI, DL, TII->get(GET_EGPR_IF_ENABLED(X86::KMOVWmk)));
509 BuildMI(MBB, MBBI, DL, TII->get(GET_EGPR_IF_ENABLED(X86::KMOVWmk)));
512 MIBLo.add(MBBI->getOperand(i));
516 MIBHi.add(MBBI->getOperand(i));
522 MachineMemOperand *OldMMO = MBBI->memoperands().front();
531 MBB.erase(MBBI);
541 const MachineOperand &InArg = MBBI->getOperand(1);
544 TII->copyPhysReg(MBB, MBBI, DL, X86::EBX, InArg.getReg(), InArg.isKill());
546 BuildMI(MBB, MBBI, DL, TII->get(X86::MWAITXrrr));
548 Register SaveRbx = MBBI->getOperand(2).getReg();
549 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, SaveRbx, /*SrcIsKill*/ true);
551 MBBI->eraseFromParent();
555 expandICallBranchFunnel(&MBB, MBBI);
614 expandCALL_RVMARKER(MBB, MBBI);
692 BuildMI(MBB, std::next(MBBI), DL, TII->get(Opc), DestReg)
807 // MBBI may be invalidated by the expansion.
808 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
809 while (MBBI != E) {
810 MachineBasicBlock::iterator NMBBI = std::next(MBBI);
811 Modified |= expandMI(MBB, MBBI);
812 MBBI = NMBBI;