Lines Matching +full:0 +full:x86
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
17 #include "X86.h"
62 unsigned StackPtr = 0;
63 unsigned SlotSize = 0;
64 int64_t StackProbeSize = 0;
67 StringRef getPassName() const override { return "X86 DynAlloca Expander"; } in getPassName()
71 char X86DynAllocaExpander::ID = 0;
81 assert(MI->getOpcode() == X86::DYN_ALLOCA_32 || in getDynAllocaAmount()
82 MI->getOpcode() == X86::DYN_ALLOCA_64); in getDynAllocaAmount()
83 assert(MI->getOperand(0).isReg()); in getDynAllocaAmount()
85 Register AmountReg = MI->getOperand(0).getReg(); in getDynAllocaAmount()
89 (Def->getOpcode() != X86::MOV32ri && Def->getOpcode() != X86::MOV64ri) || in getDynAllocaAmount()
100 if (AllocaAmount < 0 || AllocaAmount > StackProbeSize) in getLowering()
113 case X86::PUSH32r: in isPushPop()
114 case X86::PUSH32rmm: in isPushPop()
115 case X86::PUSH32rmr: in isPushPop()
116 case X86::PUSH32i: in isPushPop()
117 case X86::PUSH64r: in isPushPop()
118 case X86::PUSH64rmm: in isPushPop()
119 case X86::PUSH64rmr: in isPushPop()
120 case X86::PUSH64i32: in isPushPop()
121 case X86::POP32r: in isPushPop()
122 case X86::POP64r: in isPushPop()
154 if (MI.getOpcode() == X86::DYN_ALLOCA_32 || in computeLowerings()
155 MI.getOpcode() == X86::DYN_ALLOCA_64) { in computeLowerings()
168 Offset = 0; in computeLowerings()
173 Offset = 0; in computeLowerings()
174 } else if (MI.getOpcode() == X86::ADJCALLSTACKUP32 || in computeLowerings()
175 MI.getOpcode() == X86::ADJCALLSTACKUP64) { in computeLowerings()
176 Offset -= MI.getOperand(0).getImm(); in computeLowerings()
177 } else if (MI.getOpcode() == X86::ADJCALLSTACKDOWN32 || in computeLowerings()
178 MI.getOpcode() == X86::ADJCALLSTACKDOWN64) { in computeLowerings()
179 Offset += MI.getOperand(0).getImm(); in computeLowerings()
192 return X86::SUB64ri32; in getSubOpcode()
193 return X86::SUB32ri; in getSubOpcode()
202 if (Amount == 0) { in lower()
210 bool Is64BitAlloca = MI->getOpcode() == X86::DYN_ALLOCA_64; in lower()
224 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower()
225 BuildMI(*MBB, I, DL, TII->get(Is64Bit ? X86::PUSH64r : X86::PUSH32r)) in lower()
235 assert(Amount > 0); in lower()
238 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower()
239 BuildMI(*MBB, I, DL, TII->get(Is64Bit ? X86::PUSH64r : X86::PUSH32r)) in lower()
251 unsigned RegA = Is64BitAlloca ? X86::RAX : X86::EAX; in lower()
253 .addReg(MI->getOperand(0).getReg()); in lower()
261 TII->get(Is64BitAlloca ? X86::SUB64rr : X86::SUB32rr), StackPtr) in lower()
263 .addReg(MI->getOperand(0).getReg()); in lower()
268 Register AmountReg = MI->getOperand(0).getReg(); in lower()