Lines Matching defs:IndexReg

615   const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg);
623     assert(IndexReg.getReg() == 0 && !ForceSIB &&
717       if (IndexReg.getReg()) {
718         unsigned IndexReg16 = R16Table[getX86RegNum(IndexReg)];
748       assert(IndexReg.getReg() == 0 && "Unexpected index register!");
768   if (!ForceSIB && !X86II::needSIB(BaseReg, IndexReg.getReg(),
827   assert(IndexReg.getReg() != X86::ESP && IndexReg.getReg() != X86::RSP &&
864   unsigned IndexRegNo = IndexReg.getReg() ? getX86RegNum(IndexReg) : 4;