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1 //===-- X86BaseInfo.h - Top level definitions for X86 -------- --*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // the X86 target useful for the compiler back-end and the MC libraries.
14 //===----------------------------------------------------------------------===//
70 // AVX512 embedded rounding control. This should only have values 0-3.
123 /// \returns the type of the first instruction in macro-fusion.
256 /// \returns the type of the second instruction in macro-fusion.
353 /// X86II - This namespace holds all of the target specific flags that
359 //===------------------------------------------------------------------===//
362 /// MO_NO_FLAG - No flag for the operand
364 /// MO_GOT_ABSOLUTE_ADDRESS - On a symbol operand, this represents a
366 /// SYMBOL_LABEL + [. - PICBASELABEL]
368 /// MO_PIC_BASE_OFFSET - On a symbol operand this indicates that the
370 /// SYMBOL_LABEL - PICBASELABEL
372 /// MO_GOT - On a symbol operand this indicates that the immediate is the
374 /// See the X86-64 ELF ABI supplement for more details.
377 /// MO_GOTOFF - On a symbol operand this indicates that the immediate is
379 /// See the X86-64 ELF ABI supplement for more details.
382 /// MO_GOTPCREL - On a symbol operand this indicates that the immediate is
385 /// See the X86-64 ELF ABI supplement for more details.
388 /// MO_GOTPCREL_NORELAX - Same as MO_GOTPCREL except that R_X86_64_GOTPCREL
392 /// MO_PLT - On a symbol operand this indicates that the immediate is
394 /// See the X86-64 ELF ABI supplement for more details.
397 /// MO_TLSGD - On a symbol operand this indicates that the immediate is
401 /// See 'ELF Handling for Thread-Local Storage' for more details.
404 /// MO_TLSLD - On a symbol operand this indicates that the immediate is
408 /// block for the symbol. Used in the x86-64 local dynamic TLS access model.
409 /// See 'ELF Handling for Thread-Local Storage' for more details.
412 /// MO_TLSLDM - On a symbol operand this indicates that the immediate is
417 /// See 'ELF Handling for Thread-Local Storage' for more details.
420 /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is
421 /// the offset of the GOT entry with the thread-pointer offset for the
422 /// symbol. Used in the x86-64 initial exec TLS access model.
423 /// See 'ELF Handling for Thread-Local Storage' for more details.
426 /// MO_INDNTPOFF - On a symbol operand this indicates that the immediate is
427 /// the absolute address of the GOT entry with the negative thread-pointer
428 /// offset for the symbol. Used in the non-PIC IA32 initial exec TLS access
430 /// See 'ELF Handling for Thread-Local Storage' for more details.
433 /// MO_TPOFF - On a symbol operand this indicates that the immediate is
434 /// the thread-pointer offset for the symbol. Used in the x86-64 local
436 /// See 'ELF Handling for Thread-Local Storage' for more details.
439 /// MO_DTPOFF - On a symbol operand this indicates that the immediate is
442 /// See 'ELF Handling for Thread-Local Storage' for more details.
445 /// MO_NTPOFF - On a symbol operand this indicates that the immediate is
446 /// the negative thread-pointer offset for the symbol. Used in the IA32
448 /// See 'ELF Handling for Thread-Local Storage' for more details.
451 /// MO_GOTNTPOFF - On a symbol operand this indicates that the immediate is
452 /// the offset of the GOT entry with the negative thread-pointer offset for
454 /// See 'ELF Handling for Thread-Local Storage' for more details.
457 /// MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the
461 /// MO_DARWIN_NONLAZY - On a symbol operand "FOO", this indicates that the
463 /// non-PIC-base-relative reference to a non-hidden dyld lazy pointer stub.
465 /// MO_DARWIN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates
466 /// that the reference is actually to "FOO$non_lazy_ptr - PICBASE", which is
467 /// a PIC-base-relative reference to a non-hidden dyld lazy pointer stub.
469 /// MO_TLVP - On a symbol operand this indicates that the immediate is
473 /// MO_TLVP_PIC_BASE - On a symbol operand this indicates that the immediate
475 /// This is the 32-bit TLS offset for Darwin TLS in PIC mode.
477 /// MO_SECREL - On a symbol operand this indicates that the immediate is
481 /// MO_ABS8 - On a symbol operand this indicates that the symbol is known
485 /// MO_COFFSTUB - On a symbol operand "FOO", this indicates that the
492 //===------------------------------------------------------------------===//
496 /// PseudoFrm - This represents an instruction that is a pseudo instruction
500 /// Raw - This form is for instructions that don't have any operands, so
503 /// AddRegFrm - This form is used for instructions like 'push r32' that have
506 /// RawFrmMemOffs - This form is for instructions that store an absolute
509 /// RawFrmSrc - This form is for instructions that use the source index
512 /// RawFrmDst - This form is for instructions that use the destination index
515 /// RawFrmDstSrc - This form is for instructions that use the source index
519 /// RawFrmImm8 - This is used for the ENTER instruction, which has two
520 /// immediates, the first of which is a 16-bit immediate (specified by
521 /// the imm encoding) and the second is a 8-bit fixed value.
523 /// RawFrmImm16 - This is used for CALL FAR instructions, which have two
524 /// immediates, the first of which is a 16 or 32-bit immediate (specified by
525 /// the imm encoding) and the second is a 16-bit fixed value. In the AMD
528 /// AddCCFrm - This form is used for Jcc that encode the condition code
531 /// PrefixByte - This form is used for instructions that represent a prefix
534 /// MRMDestRegCC - This form is used for the cfcmov instructions, which use
538 /// MRMDestMemCC - This form is used for the cfcmov instructions, which use
542 /// MRMDestMem4VOp3CC - This form is used for instructions that use the Mod/RM
548 /// MRMSrcMem - But force to use the SIB field.
550 /// MRMDestMem - But force to use the SIB field.
552 /// MRMDestMem - This form is used for instructions that use the Mod/RM byte
555 /// MRMSrcMem - This form is used for instructions that use the Mod/RM byte
558 /// MRMSrcMem4VOp3 - This form is used for instructions that encode
561 /// MRMSrcMemOp4 - This form is used for instructions that use the Mod/RM
564 /// MRMSrcMemCC - This form is used for instructions that use the Mod/RM
567 /// MRMXm - This form is used for instructions that use the Mod/RM byte
571 /// MRMXm - This form is used for instructions that use the Mod/RM byte
574 /// MRM0m-MRM7m - Instructions that operate on a memory r/m operand and use
584 /// MRMDestReg - This form is used for instructions that use the Mod/RM byte
587 /// MRMSrcReg - This form is used for instructions that use the Mod/RM byte
590 /// MRMSrcReg4VOp3 - This form is used for instructions that encode
593 /// MRMSrcRegOp4 - This form is used for instructions that use the Mod/RM
596 /// MRMSrcRegCC - This form is used for instructions that use the Mod/RM
599 /// MRMXCCr - This form is used for instructions that use the Mod/RM byte
603 /// MRMXr - This form is used for instructions that use the Mod/RM byte
606 /// MRM0r-MRM7r - Instructions that operate on a register r/m operand and use
616 /// MRM0X-MRM7X - Instructions that operate that have mod=11 and an opcode but
626 /// MRM_XX (XX: C0-FF)- A mod/rm byte of exactly 0xXX.
692 //===------------------------------------------------------------------===//
694 /// OpSize - OpSizeFixed implies instruction never needs a 0x66 prefix.
695 /// OpSize16 means this is a 16-bit instruction and needs 0x66 prefix in
696 /// 32-bit mode. OpSize32 means this is a 32-bit instruction needs a 0x66
697 /// prefix in 16-bit mode.
703 /// AsSize - AdSizeX implies this instruction determines its need of 0x67
713 //===------------------------------------------------------------------===//
714 /// OpPrefix - There are several prefix bytes that are used as opcode
719 /// PD - Prefix code for packed double precision vector floating point
722 /// XS, XD - These prefix codes are for single and double precision scalar
726 //===------------------------------------------------------------------===//
727 /// OpMap - This field determines which opcode map this instruction
728 /// belongs to. i.e. one-byte, two-byte, 0x0f 0x38, 0x0f 0x3a, etc.
731 /// OB - OneByte - Set if this instruction has a one byte opcode.
733 /// TB - TwoByte - Set if this instruction has a two byte opcode, which
736 /// T8, TA - Prefix after the 0x0F prefix.
739 /// XOP8 - Prefix to include use of imm byte.
741 /// XOP9 - Prefix to exclude use of imm byte.
743 /// XOPA - Prefix to encode 0xA in VEX.MMMM of XOP instructions.
745 /// ThreeDNow - This indicates that the instruction uses the
752 /// MAP4, MAP5, MAP6, MAP7 - Prefix after the 0x0F prefix.
757 //===------------------------------------------------------------------===//
758 /// REX_W - REX prefixes are instruction prefixes used in 64-bit mode.
759 /// They are used to specify GPRs and SSE registers, 64-bit operand size,
764 //===------------------------------------------------------------------===//
765 // This 4-bit field describes the size of an immediate operand. Zero is
778 //===------------------------------------------------------------------===//
779 /// FP Instruction Classification... Zero is non-fp instruction.
780 /// FPTypeMask - Mask for all of the FP types...
783 /// NotFP - The default, set for instructions that do not use FP registers.
785 /// ZeroArgFP - 0 arg FP instruction which implicitly pushes ST(0), f.e. fld0
787 /// OneArgFP - 1 arg FP instructions which implicitly read ST(0), such as fst
789 /// OneArgFPRW - 1 arg FP instruction which implicitly read ST(0) and write a
792 /// TwoArgFP - 2 arg FP instructions which implicitly read ST(0), and an
796 /// CompareFP - 2 arg FP instructions which implicitly read ST(0) and an
799 /// CondMovFP - "2 operand" floating point conditional move instructions.
801 /// SpecialFP - Special instruction forms. Dispatch by opcode explicitly.
810 /// 0 means normal, non-SSE instruction.
815 /// LEGACY - encoding using REX/REX2 or w/o opcode prefix.
817 /// VEX - encoding using 0xC4/0xC5
819 /// XOP - Opcode prefix used by XOP instructions.
821 /// EVEX - Specifies that this instruction use EVEX form which provides
822 /// syntax support up to 32 512-bit register operands and up to 7 16-bit
828 /// VEX_4V - Used to specify an additional AVX/SSE register. Several 2
833 /// VEX_L - Stands for a bit in the VEX opcode prefix meaning the current
834 /// instruction uses 256-bit wide registers. This is usually auto detected
839 /// EVEX_K - Set if this instruction requires masking
842 /// EVEX_Z - Set if this instruction has EVEX.Z field set.
845 /// EVEX_L2 - Set if this instruction has EVEX.L' field set.
848 /// EVEX_B - Set if this instruction has EVEX.B field set.
851 /// The scaling factor for the AVX512's 8-bit compressed displacement.
870 /// EVEX_NF - Set if this instruction has EVEX.NF field set.
873 // TwoConditionalOps - Set if this instruction has two conditional operands
977 // Check for AVX-512 scatter which has a TIED_TO in the second to last
987 // Check for gather. AVX-512 has the second tied operand early. AVX2
1003 /// \returns operand # for the first field of the memory operand or -1 if no
1026 return -1;
1065 return -1;
1074 return -1;
1151 return -1;
1157 static_assert(X86::XMM15 - X86::XMM0 == 15,
1158 "XMM0-15 registers are not continuous");
1159 static_assert(X86::XMM31 - X86::XMM16 == 15,
1160 "XMM16-31 registers are not continuous");
1167 static_assert(X86::YMM15 - X86::YMM0 == 15,
1168 "YMM0-15 registers are not continuous");
1169 static_assert(X86::YMM31 - X86::YMM16 == 15,
1170 "YMM16-31 registers are not continuous");
1177 static_assert(X86::ZMM31 - X86::ZMM0 == 31,
1178 "ZMM registers are not continuous");
1184 static_assert(X86::R31WH - X86::R16 == 95, "EGPRs are not continuous");
1188 /// \returns true if the MachineOperand is a x86-64 extended (r8 or
1331 // If there is no base register and we're in 64-bit mode, we need a SIB
1332 // byte to emit an addr that is just 'disp32' (the non-RIP relative form).