Lines Matching defs:Op
383 const MCOperand &Op = MI->getOperand(OpNo);
384 if (Op.isReg()) {
385 printRegName(O, Op.getReg());
386 } else if (Op.isImm()) {
388 int64_t Imm = Op.getImm();
407 assert(Op.isExpr() && "unknown operand kind in printOperand");
410 Op.getExpr()->print(O, &MAI);
414 void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
426 const MCOperand &BaseReg = MI->getOperand(Op + X86::AddrBaseReg);
427 const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg);
428 const MCOperand &DispSpec = MI->getOperand(Op + X86::AddrDisp);
433 printOptionalSegReg(MI, Op + X86::AddrSegmentReg, O);
447 printOperand(MI, Op + X86::AddrBaseReg, O);
451 printOperand(MI, Op + X86::AddrIndexReg, O);
452 unsigned ScaleVal = MI->getOperand(Op + X86::AddrScaleAmt).getImm();
462 void X86ATTInstPrinter::printSrcIdx(const MCInst *MI, unsigned Op,
467 printOptionalSegReg(MI, Op + 1, O);
470 printOperand(MI, Op, O);
474 void X86ATTInstPrinter::printDstIdx(const MCInst *MI, unsigned Op,
479 printOperand(MI, Op, O);
483 void X86ATTInstPrinter::printMemOffset(const MCInst *MI, unsigned Op,
485 const MCOperand &DispSpec = MI->getOperand(Op);
490 printOptionalSegReg(MI, Op + 1, O);
500 void X86ATTInstPrinter::printU8Imm(const MCInst *MI, unsigned Op,
502 if (MI->getOperand(Op).isExpr())
503 return printOperand(MI, Op, O);
506 << '$' << formatImm(MI->getOperand(Op).getImm() & 0xff);
511 const MCOperand &Op = MI->getOperand(OpNo);
512 unsigned Reg = Op.getReg();