Lines Matching +full:fine +full:- +full:tune

1 //===- X86RegisterBankInfo.cpp -----------------------------------*- C++ -*-==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
44          "GPRs should hold up to 64-bit");
107   // No. Check if we have a copy-like instruction. If we do, then we could
170   const X86Subtarget *ST = &MF->getSubtarget<X86Subtarget>();
171   bool HasSSE1 = ST->hasSSE1();
172   bool HasSSE2 = ST->hasSSE2();
250     if (!Mapping->isValid())
261   const MachineFunction &MF = *MI.getParent()->getParent();
277   const MachineFunction &MF = *MI.getParent()->getParent();
283   // Try the default logic for non-generic instructions that are either
321     // Instruction having only floating-point operands (all scalars in
327     // Some of the floating-point instructions have mixed GPR and FP
328     // operands: fine-tune the computed mapping.
423   const MachineFunction &MF = *MI.getParent()->getParent();