Lines Matching +full:1 +full:- +full:based

1 //=- WebAssemblyInstrFormats.td - WebAssembly Instr. Formats -*- tablegen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
15 // We instantiate 2 of these for every actual instruction (register based
16 // and stack based), see below.
28   // e.g. the disassembler use case) prefer the one where IsCanonical == 1.
34          string asmstr = "", bits<32> inst = -1, bit is64 = false>
42 // Generates both register and stack based versions of one actual instruction.
44 // based version of this instruction, as well as the corresponding asmstr.
45 // The register versions have virtual-register operands which correspond to wasm
53 // Every instruction should want to be based on this multi-class to guarantee
57              bits<32> inst = -1, bit is64 = false> {
58   let isCodeGenOnly = 1 in
66                bits<32> inst = -1> {