Lines Matching refs:I64
44 (ins P2Align:$p2align, offset64_op:$off, I64:$addr, I32:$count),
52 I64:$timeout),
58 (ins P2Align:$p2align, offset64_op:$off, I64:$addr, I32:$exp,
59 I64:$timeout),
65 (ins P2Align:$p2align, offset32_op:$off, I32:$addr, I64:$exp,
66 I64:$timeout),
72 (ins P2Align:$p2align, offset64_op:$off, I64:$addr, I64:$exp,
73 I64:$timeout),
85 Pat<(i32 (int_wasm_memory_atomic_notify (AddrOps64 offset64_op:$offset, I64:$addr), I32:$count)),
92 Pat<(i32 (kind (AddrOps32 offset32_op:$offset, I32:$addr), ty:$exp, I64:$timeout)),
96 Pat<(i32 (kind (AddrOps64 offset64_op:$offset, I64:$addr), ty:$exp, I64:$timeout)),
127 defm ATOMIC_LOAD_I64 : AtomicLoad<I64, "i64.atomic.load", 0x11>;
137 defm ATOMIC_LOAD8_U_I64 : AtomicLoad<I64, "i64.atomic.load8_u", 0x14>;
138 defm ATOMIC_LOAD16_U_I64 : AtomicLoad<I64, "i64.atomic.load16_u", 0x15>;
139 defm ATOMIC_LOAD32_U_I64 : AtomicLoad<I64, "i64.atomic.load32_u", 0x16>;
193 defm ATOMIC_STORE_I64 : AtomicStore<I64, "i64.atomic.store", 0x18>;
205 def : Pat<(kind ty:$val, (AddrOps64 offset64_op:$offset, I64:$addr)),
215 defm ATOMIC_STORE8_I64 : AtomicStore<I64, "i64.atomic.store8", 0x1b>;
216 defm ATOMIC_STORE16_I64 : AtomicStore<I64, "i64.atomic.store16", 0x1c>;
217 defm ATOMIC_STORE32_I64 : AtomicStore<I64, "i64.atomic.store32", 0x1d>;
252 (ins P2Align:$p2align, offset64_op:$off, I64:$addr, rc:$val),
259 defm ATOMIC_RMW_ADD_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.add", 0x1f>;
265 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.add_u", 0x22>;
267 WebAssemblyBinRMW<I64, "i64.atomic.rmw16.add_u", 0x23>;
269 WebAssemblyBinRMW<I64, "i64.atomic.rmw32.add_u", 0x24>;
272 defm ATOMIC_RMW_SUB_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.sub", 0x26>;
278 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.sub_u", 0x29>;
280 WebAssemblyBinRMW<I64, "i64.atomic.rmw16.sub_u", 0x2a>;
282 WebAssemblyBinRMW<I64, "i64.atomic.rmw32.sub_u", 0x2b>;
285 defm ATOMIC_RMW_AND_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.and", 0x2d>;
291 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.and_u", 0x30>;
293 WebAssemblyBinRMW<I64, "i64.atomic.rmw16.and_u", 0x31>;
295 WebAssemblyBinRMW<I64, "i64.atomic.rmw32.and_u", 0x32>;
298 defm ATOMIC_RMW_OR_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.or", 0x34>;
304 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.or_u", 0x37>;
306 WebAssemblyBinRMW<I64, "i64.atomic.rmw16.or_u", 0x38>;
308 WebAssemblyBinRMW<I64, "i64.atomic.rmw32.or_u", 0x39>;
311 defm ATOMIC_RMW_XOR_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.xor", 0x3b>;
317 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.xor_u", 0x3e>;
319 WebAssemblyBinRMW<I64, "i64.atomic.rmw16.xor_u", 0x3f>;
321 WebAssemblyBinRMW<I64, "i64.atomic.rmw32.xor_u", 0x40>;
326 WebAssemblyBinRMW<I64, "i64.atomic.rmw.xchg", 0x42>;
332 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.xchg_u", 0x45>;
334 WebAssemblyBinRMW<I64, "i64.atomic.rmw16.xchg_u", 0x46>;
336 WebAssemblyBinRMW<I64, "i64.atomic.rmw32.xchg_u", 0x47>;
342 def : Pat<(ty (kind (AddrOps64 offset64_op:$offset, I64:$addr), ty:$val)),
457 (ins P2Align:$p2align, offset64_op:$off, I64:$addr, rc:$exp,
467 WebAssemblyTerRMW<I64, "i64.atomic.rmw.cmpxchg", 0x49>;
473 WebAssemblyTerRMW<I64, "i64.atomic.rmw8.cmpxchg_u", 0x4c>;
475 WebAssemblyTerRMW<I64, "i64.atomic.rmw16.cmpxchg_u", 0x4d>;
477 WebAssemblyTerRMW<I64, "i64.atomic.rmw32.cmpxchg_u", 0x4e>;
483 def : Pat<(ty (kind (AddrOps64 offset64_op:$offset, I64:$addr), ty:$exp, ty:$new)),