Lines Matching defs:Val
205 inline static VECC::CondCode VEValToCondCode(unsigned Val, bool IsInteger) {
207 switch (Val) {
226 switch (Val) {
309 inline static VERD::RoundingMode VEValToRD(unsigned Val) {
310 switch (Val) {
331 inline static bool isMImmVal(uint64_t Val) {
332 if (Val == 0) {
336 if (isMask_64(Val)) {
341 return (Val & (UINT64_C(1) << 63)) && isShiftedMask_64(Val);
344 inline static bool isMImm32Val(uint32_t Val) {
345 if (Val == 0) {
349 if (isMask_32(Val)) {
354 return (Val & (UINT32_C(1) << 31)) && isShiftedMask_32(Val);
358 inline static uint64_t val2MImm(uint64_t Val) {
359 if (Val == 0)
361 if (Val & (UINT64_C(1) << 63))
362 return llvm::countl_one(Val); // (m)1
363 return llvm::countl_zero(Val) | 0x40; // (m)0
367 inline static uint64_t mimm2Val(uint64_t Val) {
368 if (Val == 0)
370 if ((Val & 0x40) == 0)
371 return (uint64_t)((INT64_C(1) << 63) >> (Val & 0x3f)); // (m)1
372 return ((uint64_t)INT64_C(-1) >> (Val & 0x3f)); // (m)0
375 inline unsigned M0(unsigned Val) { return Val + 64; }
376 inline unsigned M1(unsigned Val) { return Val; }