Lines Matching defs:HighOpcode

95   unsigned HighOpcode = getOpcodeForOffset(NewOpcode, HighOffsetOp.getImm());
97   assert(HighOpcode && LowOpcode && "Both offsets should be in range");
98   HighPartMI->setDesc(get(HighOpcode));
150 // if the first operand is a low GR32 and HighOpcode if the first operand
152 // and HighOpcode takes an unsigned 32-bit operand.  In those cases,
154 // if HighOpcode is used.
156                                       unsigned HighOpcode,
160   MI.setDesc(get(IsHigh ? HighOpcode : LowOpcode));
167 // followed by HighOpcode or LowOpcode, depending on whether the target
171                                        unsigned HighOpcode) const {
185     MI.setDesc(get(DestIsHigh ? HighOpcode : LowOpcode));
191 // if the first operand is a low GR32 and HighOpcode if the first operand
194                                        unsigned HighOpcode) const {
197       SystemZ::isHighReg(Reg) ? HighOpcode : LowOpcode,
204 // register is a low GR32 and HighOpcode if the register is a high GR32.
206                                        unsigned HighOpcode) const {
208   unsigned Opcode = SystemZ::isHighReg(Reg) ? HighOpcode : LowOpcode;