Lines Matching defs:Reg2
428 Register &Reg2, const MCExpr *&Disp, const MCExpr *&Length,
988 // Parse a memory operand into Reg1, Reg2, Disp, and Length.
990 bool &HaveReg2, Register &Reg2,
1017 // The restriction only applies to the first Register (i.e. Reg1). Reg2 is
1065 if (parseIntegerRegister(Reg2, RegGR))
1068 if (isParsingATT() && parseRegister(Reg2))
1102 Register Reg1, Reg2;
1109 if (parseAddress(HaveReg1, Reg1, HaveReg2, Reg2, Disp, Length, HasLength,
1128 // There must be no Reg2.
1144 // If we have Reg2, it must be an address register.
1146 if (parseAddressRegister(Reg2))
1148 Base = Reg2.Num == 0 ? 0 : Regs[Reg2.Num];
1152 // If we have Reg2, it must be an address register.
1154 if (parseAddressRegister(Reg2))
1156 Base = Reg2.Num == 0 ? 0 : Regs[Reg2.Num];
1170 // If we have Reg2, it must be an address register.
1172 if (parseAddressRegister(Reg2))
1174 Base = Reg2.Num == 0 ? 0 : Regs[Reg2.Num];
1182 // If we have Reg2, it must be an address register.
1184 if (parseAddressRegister(Reg2))
1186 Base = Reg2.Num == 0 ? 0 : Regs[Reg2.Num];
1495 Register Reg1, Reg2;
1499 if (parseAddress(HaveReg1, Reg1, HaveReg2, Reg2, Expr, Length,
1507 if (HaveReg2 && parseAddressRegister(Reg2))