Lines Matching defs:Operands
423 ParseStatus parseRegister(OperandVector &Operands, RegisterKind Kind);
425 ParseStatus parseAnyRegister(OperandVector &Operands);
436 ParseStatus parseAddress(OperandVector &Operands, MemoryKind MemKind,
439 ParseStatus parsePCRel(OperandVector &Operands, int64_t MinVal,
442 bool parseOperand(OperandVector &Operands, StringRef Mnemonic);
502 SMLoc NameLoc, OperandVector &Operands) override;
504 OperandVector &Operands, MCStreamer &Out,
510 ParseStatus parseGR32(OperandVector &Operands) {
511 return parseRegister(Operands, GR32Reg);
513 ParseStatus parseGRH32(OperandVector &Operands) {
514 return parseRegister(Operands, GRH32Reg);
516 ParseStatus parseGRX32(OperandVector &Operands) {
519 ParseStatus parseGR64(OperandVector &Operands) {
520 return parseRegister(Operands, GR64Reg);
522 ParseStatus parseGR128(OperandVector &Operands) {
523 return parseRegister(Operands, GR128Reg);
525 ParseStatus parseADDR32(OperandVector &Operands) {
527 return parseRegister(Operands, GR32Reg);
529 ParseStatus parseADDR64(OperandVector &Operands) {
531 return parseRegister(Operands, GR64Reg);
533 ParseStatus parseADDR128(OperandVector &Operands) {
536 ParseStatus parseFP32(OperandVector &Operands) {
537 return parseRegister(Operands, FP32Reg);
539 ParseStatus parseFP64(OperandVector &Operands) {
540 return parseRegister(Operands, FP64Reg);
542 ParseStatus parseFP128(OperandVector &Operands) {
543 return parseRegister(Operands, FP128Reg);
545 ParseStatus parseVR32(OperandVector &Operands) {
546 return parseRegister(Operands, VR32Reg);
548 ParseStatus parseVR64(OperandVector &Operands) {
549 return parseRegister(Operands, VR64Reg);
551 ParseStatus parseVF128(OperandVector &Operands) {
554 ParseStatus parseVR128(OperandVector &Operands) {
555 return parseRegister(Operands, VR128Reg);
557 ParseStatus parseAR32(OperandVector &Operands) {
558 return parseRegister(Operands, AR32Reg);
560 ParseStatus parseCR64(OperandVector &Operands) {
561 return parseRegister(Operands, CR64Reg);
563 ParseStatus parseAnyReg(OperandVector &Operands) {
564 return parseAnyRegister(Operands);
566 ParseStatus parseBDAddr32(OperandVector &Operands) {
567 return parseAddress(Operands, BDMem, GR32Reg);
569 ParseStatus parseBDAddr64(OperandVector &Operands) {
570 return parseAddress(Operands, BDMem, GR64Reg);
572 ParseStatus parseBDXAddr64(OperandVector &Operands) {
573 return parseAddress(Operands, BDXMem, GR64Reg);
575 ParseStatus parseBDLAddr64(OperandVector &Operands) {
576 return parseAddress(Operands, BDLMem, GR64Reg);
578 ParseStatus parseBDRAddr64(OperandVector &Operands) {
579 return parseAddress(Operands, BDRMem, GR64Reg);
581 ParseStatus parseBDVAddr64(OperandVector &Operands) {
582 return parseAddress(Operands, BDVMem, GR64Reg);
584 ParseStatus parsePCRel12(OperandVector &Operands) {
585 return parsePCRel(Operands, -(1LL << 12), (1LL << 12) - 1, false);
587 ParseStatus parsePCRel16(OperandVector &Operands) {
588 return parsePCRel(Operands, -(1LL << 16), (1LL << 16) - 1, false);
590 ParseStatus parsePCRel24(OperandVector &Operands) {
591 return parsePCRel(Operands, -(1LL << 24), (1LL << 24) - 1, false);
593 ParseStatus parsePCRel32(OperandVector &Operands) {
594 return parsePCRel(Operands, -(1LL << 32), (1LL << 32) - 1, false);
596 ParseStatus parsePCRelTLS16(OperandVector &Operands) {
597 return parsePCRel(Operands, -(1LL << 16), (1LL << 16) - 1, true);
599 ParseStatus parsePCRelTLS32(OperandVector &Operands) {
600 return parsePCRel(Operands, -(1LL << 32), (1LL << 32) - 1, true);
813 // Parse a register of kind Kind and add it to Operands.
814 ParseStatus SystemZAsmParser::parseRegister(OperandVector &Operands,
890 Operands.push_back(
895 // Parse any type of register (including integers) and add it to Operands.
896 ParseStatus SystemZAsmParser::parseAnyRegister(OperandVector &Operands) {
914 Operands.push_back(SystemZOperand::createImm(Register, StartLoc, EndLoc));
954 Operands.push_back(SystemZOperand::createReg(Kind, RegNo,
1095 // Parse a memory operand and add it to Operands. The other arguments
1097 ParseStatus SystemZAsmParser::parseAddress(OperandVector &Operands,
1193 Operands.push_back(SystemZOperand::createMem(MemKind, RegKind, Base, Disp,
1223 SmallVector<std::unique_ptr<MCParsedAsmOperand>, 8> Operands;
1253 ResTy = parseAnyReg(Operands);
1255 ResTy = parseVR128(Operands);
1257 ResTy = parseBDXAddr64(Operands);
1259 ResTy = parseBDAddr64(Operands);
1261 ResTy = parseBDVAddr64(Operands);
1263 ResTy = parsePCRel32(Operands);
1265 ResTy = parsePCRel16(Operands);
1278 Operands.push_back(SystemZOperand::createImm(Expr, StartLoc, EndLoc));
1289 for (size_t I = 0; I < Operands.size(); I++) {
1290 MCParsedAsmOperand &Operand = *Operands[I];
1396 OperandVector &Operands) {
1402 Operands.push_back(SystemZOperand::createToken(Name, NameLoc));
1407 if (parseOperand(Operands, Name)) {
1420 if (parseOperand(Operands, Name)) {
1457 bool SystemZAsmParser::parseOperand(OperandVector &Operands,
1468 ParseStatus Res = MatchOperandParserImpl(Operands, Mnemonic);
1487 Operands.push_back(SystemZOperand::createInvalid(Reg.StartLoc, Reg.EndLoc));
1513 Operands.push_back(SystemZOperand::createInvalid(StartLoc, EndLoc));
1515 Operands.push_back(SystemZOperand::createImm(Expr, StartLoc, EndLoc));
1520 OperandVector &Operands,
1530 MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures,
1555 if (ErrorInfo >= Operands.size())
1558 ErrorLoc = ((SystemZOperand &)*Operands[ErrorInfo]).getStartLoc();
1568 ((SystemZOperand &)*Operands[0]).getToken(), FBS, Dialect);
1570 ((SystemZOperand &)*Operands[0]).getLocRange());
1577 ParseStatus SystemZAsmParser::parsePCRel(OperandVector &Operands,
1656 Operands.push_back(SystemZOperand::createImmTLS(Expr, Sym,
1659 Operands.push_back(SystemZOperand::createImm(Expr, StartLoc, EndLoc));