Lines Matching defs:MemKind

116   // MemKind says what type of memory this is and RegKind says what type
122     unsigned MemKind : 4;
189   createMem(MemoryKind MemKind, RegisterKind RegKind, unsigned Base,
193     Op->Mem.MemKind = MemKind;
198     if (MemKind == BDLMem)
200     if (MemKind == BDRMem)
261   bool isMem(MemoryKind MemKind) const {
263             (Mem.MemKind == MemKind ||
266              (Mem.MemKind == BDMem && MemKind == BDXMem)));
268   bool isMem(MemoryKind MemKind, RegisterKind RegKind) const {
269     return isMem(MemKind) && Mem.RegKind == RegKind;
271   bool isMemDisp12(MemoryKind MemKind, RegisterKind RegKind) const {
272     return isMem(MemKind, RegKind) && inRange(Mem.Disp, 0, 0xfff, true);
274   bool isMemDisp20(MemoryKind MemKind, RegisterKind RegKind) const {
275     return isMem(MemKind, RegKind) && inRange(Mem.Disp, -524288, 524287, true);
436   ParseStatus parseAddress(OperandVector &Operands, MemoryKind MemKind,
742       if (Op.MemKind == BDLMem)
744       else if (Op.MemKind == BDRMem)
1098                                            MemoryKind MemKind,
1107   bool HasLength = (MemKind == BDLMem) ? true : false;
1108   bool HasVectorIndex = (MemKind == BDVMem) ? true : false;
1120   switch (MemKind) {
1193   Operands.push_back(SystemZOperand::createMem(MemKind, RegKind, Base, Disp,