Lines Matching defs:SPCC
1517 static SPCC::CondCodes intCondCCodeToRcond(ISD::CondCode CC) {
1522 return SPCC::REG_Z;
1524 return SPCC::REG_NZ;
1526 return SPCC::REG_LZ;
1528 return SPCC::REG_GZ;
1530 return SPCC::REG_LEZ;
1532 return SPCC::REG_GEZ;
1538 static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) {
1541 case ISD::SETEQ: return SPCC::ICC_E;
1542 case ISD::SETNE: return SPCC::ICC_NE;
1543 case ISD::SETLT: return SPCC::ICC_L;
1544 case ISD::SETGT: return SPCC::ICC_G;
1545 case ISD::SETLE: return SPCC::ICC_LE;
1546 case ISD::SETGE: return SPCC::ICC_GE;
1547 case ISD::SETULT: return SPCC::ICC_CS;
1548 case ISD::SETULE: return SPCC::ICC_LEU;
1549 case ISD::SETUGT: return SPCC::ICC_GU;
1550 case ISD::SETUGE: return SPCC::ICC_CC;
1556 static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
1560 case ISD::SETOEQ: return SPCC::FCC_E;
1562 case ISD::SETUNE: return SPCC::FCC_NE;
1564 case ISD::SETOLT: return SPCC::FCC_L;
1566 case ISD::SETOGT: return SPCC::FCC_G;
1568 case ISD::SETOLE: return SPCC::FCC_LE;
1570 case ISD::SETOGE: return SPCC::FCC_GE;
1571 case ISD::SETULT: return SPCC::FCC_UL;
1572 case ISD::SETULE: return SPCC::FCC_ULE;
1573 case ISD::SETUGT: return SPCC::FCC_UG;
1574 case ISD::SETUGE: return SPCC::FCC_UGE;
1575 case ISD::SETUO: return SPCC::FCC_U;
1576 case ISD::SETO: return SPCC::FCC_O;
1577 case ISD::SETONE: return SPCC::FCC_LG;
1578 case ISD::SETUEQ: return SPCC::FCC_UE;
2076 // set LHS/RHS and SPCC to the LHS/RHS of the setcc and SPCC to the condition.
2078 ISD::CondCode CC, unsigned &SPCC) {
2088 SPCC = LHS.getConstantOperandVal(2);
2394 unsigned &SPCC, const SDLoc &DL,
2399 switch(SPCC) {
2401 case SPCC::FCC_E : LibCall = is64Bit? "_Qp_feq" : "_Q_feq"; break;
2402 case SPCC::FCC_NE : LibCall = is64Bit? "_Qp_fne" : "_Q_fne"; break;
2403 case SPCC::FCC_L : LibCall = is64Bit? "_Qp_flt" : "_Q_flt"; break;
2404 case SPCC::FCC_G : LibCall = is64Bit? "_Qp_fgt" : "_Q_fgt"; break;
2405 case SPCC::FCC_LE : LibCall = is64Bit? "_Qp_fle" : "_Q_fle"; break;
2406 case SPCC::FCC_GE : LibCall = is64Bit? "_Qp_fge" : "_Q_fge"; break;
2407 case SPCC::FCC_UL :
2408 case SPCC::FCC_ULE:
2409 case SPCC::FCC_UG :
2410 case SPCC::FCC_UGE:
2411 case SPCC::FCC_U :
2412 case SPCC::FCC_O :
2413 case SPCC::FCC_LG :
2414 case SPCC::FCC_UE : LibCall = is64Bit? "_Qp_cmp" : "_Q_cmp"; break;
2434 switch(SPCC) {
2437 SPCC = SPCC::ICC_NE;
2440 case SPCC::FCC_UL : {
2444 SPCC = SPCC::ICC_NE;
2447 case SPCC::FCC_ULE: {
2449 SPCC = SPCC::ICC_NE;
2452 case SPCC::FCC_UG : {
2454 SPCC = SPCC::ICC_G;
2457 case SPCC::FCC_UGE: {
2459 SPCC = SPCC::ICC_NE;
2463 case SPCC::FCC_U : {
2465 SPCC = SPCC::ICC_E;
2468 case SPCC::FCC_O : {
2470 SPCC = SPCC::ICC_NE;
2473 case SPCC::FCC_LG : {
2477 SPCC = SPCC::ICC_NE;
2480 case SPCC::FCC_UE : {
2484 SPCC = SPCC::ICC_E;
2630 unsigned Opc, SPCC = ~0U;
2634 LookThroughSetCC(LHS, RHS, CC, SPCC);
2649 if (SPCC == ~0U) SPCC = IntCondCCodeToICC(CC);
2658 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2659 CompareFlag = TLI.LowerF128Compare(LHS, RHS, SPCC, dl, DAG);
2664 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2669 DAG.getConstant(SPCC, dl, MVT::i32), CompareFlag);
2681 unsigned Opc, SPCC = ~0U;
2685 LookThroughSetCC(LHS, RHS, CC, SPCC);
2709 if (SPCC == ~0U) SPCC = IntCondCCodeToICC(CC);
2712 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2713 CompareFlag = TLI.LowerF128Compare(LHS, RHS, SPCC, dl, DAG);
2719 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2723 DAG.getConstant(SPCC, dl, MVT::i32), CompareFlag);
3364 unsigned CC = (SPCC::CondCodes)MI.getOperand(3).getImm();