Lines Matching defs:MIB
179 void renderImm32(MachineInstrBuilder &MIB, const MachineInstr &I,
181 void renderFImm32(MachineInstrBuilder &MIB, const MachineInstr &I,
372 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpVectorShuffle))
378 MIB.addImm(V);
379 return MIB.constrainAllUses(TII, TRI, RBI);
556 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpSpecConstantOp))
564 return MIB.constrainAllUses(TII, TRI, RBI);
645 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExtInst))
652 MIB.add(I.getOperand(i));
653 return MIB.constrainAllUses(TII, TRI, RBI);
744 MachineInstrBuilder &MIB) {
754 MIB.addImm(SpvMemOp);
756 MIB.addImm(MemOp->getAlign().value());
760 static void addMemoryOperands(uint64_t Flags, MachineInstrBuilder &MIB) {
768 MIB.addImm(SpvMemOp);
776 auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpLoad))
784 addMemoryOperands(I.getOperand(2 + OpOffset).getImm(), MIB);
786 addMemoryOperands(*I.memoperands_begin(), MIB);
788 return MIB.constrainAllUses(TII, TRI, RBI);
796 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpStore))
803 addMemoryOperands(I.getOperand(2 + OpOffset).getImm(), MIB);
805 addMemoryOperands(*I.memoperands_begin(), MIB);
807 return MIB.constrainAllUses(TII, TRI, RBI);
875 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpCopyMemorySized))
880 addMemoryOperands(*I.memoperands_begin(), MIB);
881 bool Result = MIB.constrainAllUses(TII, TRI, RBI);
882 if (ResVReg.isValid() && ResVReg != MIB->getOperand(0).getReg())
884 .addUse(MIB->getOperand(0).getReg());
951 auto MIB =
957 Res |= MIB.constrainAllUses(TII, TRI, RBI);
1421 auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(),
1426 MIB.addUse(I.getOperand(i).getReg());
1427 return MIB.constrainAllUses(TII, TRI, RBI);
1518 auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(),
1524 MIB.addUse(OpReg);
1525 return MIB.constrainAllUses(TII, TRI, RBI);
1561 void SPIRVInstructionSelector::renderFImm32(MachineInstrBuilder &MIB,
1567 addNumImm(FPImm->getValueAPF().bitcastToAPInt(), MIB);
1570 void SPIRVInstructionSelector::renderImm32(MachineInstrBuilder &MIB,
1575 addNumImm(I.getOperand(1).getCImm()->getValue(), MIB);
1784 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantI))
1789 addNumImm(Imm, MIB);
1790 return MIB.constrainAllUses(TII, TRI, RBI);
1826 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpCompositeInsert))
1834 MIB.addImm(foldImm(I.getOperand(i), MRI));
1835 return MIB.constrainAllUses(TII, TRI, RBI);
1842 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpCompositeExtract))
1847 MIB.addImm(foldImm(I.getOperand(i), MRI));
1848 return MIB.constrainAllUses(TII, TRI, RBI);
1983 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpUndef))
1986 return MIB.constrainAllUses(TII, TRI, RBI);
1999 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(Opcode))
2005 MIB.addUse(OpReg);
2007 return MIB.constrainAllUses(TII, TRI, RBI);
2010 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpName));
2011 MIB.addUse(I.getOperand(I.getNumExplicitDefs() + 1).getReg());
2014 MIB.addImm(I.getOperand(i).getImm());
2016 return MIB.constrainAllUses(TII, TRI, RBI);
2019 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpSwitch));
2022 MIB.addReg(I.getOperand(i).getReg());
2024 addNumImm(I.getOperand(i).getCImm()->getValue(), MIB);
2026 MIB.addMBB(I.getOperand(i).getMBB());
2030 return MIB.constrainAllUses(TII, TRI, RBI);
2177 auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpPhi))
2182 MIB.addUse(I.getOperand(i + 0).getReg());
2183 MIB.addMBB(I.getOperand(i + 1).getMBB());
2185 return MIB.constrainAllUses(TII, TRI, RBI);
2402 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpCompositeExtract))
2407 return MIB.constrainAllUses(TII, TRI, RBI);