Lines Matching defs:EmitIR

62     SPIRV::AccessQualifier::AccessQualifier AccessQual, bool EmitIR) {
64       getOrCreateSPIRVType(Type, MIRBuilder, AccessQual, EmitIR);
299                                                bool EmitIR) {
312     LLT LLTy = LLT::scalar(EmitIR ? BitWidth : 32);
316                      SPIRV::AccessQualifier::ReadWrite, EmitIR);
318     if (EmitIR) {
503     uint64_t Val, MachineIRBuilder &MIRBuilder, SPIRVType *SpvType, bool EmitIR,
508     if (Val || EmitIR) {
511       SpvScalConst = buildConstantInt(Val, MIRBuilder, SpvBaseType, EmitIR);
513     LLT LLTy = EmitIR ? LLT::fixed_vector(ElemCnt, BitWidth) : LLT::scalar(32);
519     if (EmitIR) {
542                                               SPIRVType *SpvType, bool EmitIR) {
551   return getOrCreateIntCompositeOrNull(Val, MIRBuilder, SpvType, EmitIR,
707                                                bool EmitIR) {
711       buildConstantInt(NumElems, MIRBuilder, nullptr, EmitIR);
732                                                 bool EmitIR) {
801     SPIRV::AccessQualifier::AccessQualifier AccQual, bool EmitIR) {
808   return restOfCreateSPIRVType(Ty, MIRBuilder, AccQual, EmitIR);
841     SPIRV::AccessQualifier::AccessQualifier AccQual, bool EmitIR) {
869     return getOpTypeArray(Ty->getArrayNumElements(), El, MIRBuilder, EmitIR);
874     return getOpTypeStruct(SType, MIRBuilder, EmitIR);
895                                           AccQual, EmitIR);
922     SPIRV::AccessQualifier::AccessQualifier AccessQual, bool EmitIR) {
926   SPIRVType *SpirvType = createSPIRVType(Ty, MIRBuilder, AccessQual, EmitIR);
964     SPIRV::AccessQualifier::AccessQualifier AccessQual, bool EmitIR) {
981   SPIRVType *STy = restOfCreateSPIRVType(Ty, MIRBuilder, AccessQual, EmitIR);
989       STy2 = restOfCreateSPIRVType(Ty2, MIRBuilder, AccessQual, EmitIR);