Lines Matching full:sifive
86 def SIFIVE_7 : RISCVTuneProcessorModel<"sifive-7-series",
90 def SIFIVE_E20 : RISCVProcessorModel<"sifive-e20",
99 def SIFIVE_E21 : RISCVProcessorModel<"sifive-e21",
109 def SIFIVE_E24 : RISCVProcessorModel<"sifive-e24",
119 def SIFIVE_E31 : RISCVProcessorModel<"sifive-e31",
129 def SIFIVE_E34 : RISCVProcessorModel<"sifive-e34",
139 def SIFIVE_E76 : RISCVProcessorModel<"sifive-e76",
150 def SIFIVE_S21 : RISCVProcessorModel<"sifive-s21",
160 def SIFIVE_S51 : RISCVProcessorModel<"sifive-s51",
170 def SIFIVE_S54 : RISCVProcessorModel<"sifive-s54",
181 def SIFIVE_S76 : RISCVProcessorModel<"sifive-s76",
194 def SIFIVE_U54 : RISCVProcessorModel<"sifive-u54",
205 def SIFIVE_U74 : RISCVProcessorModel<"sifive-u74",
217 def SIFIVE_X280 : RISCVProcessorModel<"sifive-x280", SiFive7Model,
237 def SIFIVE_P450 : RISCVProcessorModel<"sifive-p450", SiFiveP400Model,
270 def SIFIVE_P670 : RISCVProcessorModel<"sifive-p670", SiFiveP600Model,