Lines Matching defs:ST
69 const RISCVSubtarget &ST, MachineRegisterInfo &MRI);
71 const RISCVSubtarget &ST, MachineRegisterInfo &MRI);
73 const RISCVSubtarget &ST, MachineRegisterInfo &MRI);
120 const RISCVSubtarget &ST,
200 if (Bits >= (ST.getXLen() / 2))
219 if (Bits >= (ST.getXLen() - UserMI->getOperand(2).getImm()))
244 if (Bits >= Log2_32(ST.getXLen()))
256 if (OpIdx == 2 && Bits >= Log2_32(ST.getXLen()))
344 static bool hasAllWUsers(const MachineInstr &OrigMI, const RISCVSubtarget &ST,
346 return hasAllNBitUsers(OrigMI, ST, MRI, 32);
396 static bool isSignExtendedW(Register SrcReg, const RISCVSubtarget &ST,
597 if (hasAllWUsers(*MI, ST, MRI)) {
632 const RISCVSubtarget &ST,
651 if (!hasAllWUsers(MI, ST, MRI) &&
652 !isSignExtendedW(SrcReg, ST, MRI, FixableDefs))
684 const RISCVSubtarget &ST,
699 if (hasAllWUsers(MI, ST, MRI)) {
711 const RISCVSubtarget &ST,
745 if (hasAllWUsers(MI, ST, MRI)) {
766 const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>();
767 const RISCVInstrInfo &TII = *ST.getInstrInfo();
769 if (!ST.is64Bit())
773 MadeChange |= removeSExtWInstrs(MF, TII, ST, MRI);
775 if (!(DisableStripWSuffix || ST.preferWInst()))
776 MadeChange |= stripWSuffixes(MF, TII, ST, MRI);
778 if (ST.preferWInst())
779 MadeChange |= appendWSuffixes(MF, TII, ST, MRI);