Lines Matching defs:RegImm

282                                         RegImmPair RegImm,
296     if (CandidateRegImm.Reg == RegImm.Reg && CandidateRegImm.Imm == RegImm.Imm)
299     // If RegImm.Reg is modified by this instruction, then we cannot optimize
304     if (MI.modifiesRegister(RegImm.Reg, TRI))
313   if (MIs.size() < 2 || (RegImm.Imm != 0 && MIs.size() < 3))
321   if (RISCV::GPRRegClass.contains(RegImm.Reg))
323   else if (RISCV::FPR32RegClass.contains(RegImm.Reg))
325   else if (RISCV::FPR64RegClass.contains(RegImm.Reg))
395       RegImmPair RegImm = getRegImmPairPreventingCompression(MI);
396       if (!RegImm.Reg && RegImm.Imm == 0)
403       Register NewReg = analyzeCompressibleUses(MI, RegImm, MIs);
408       if (RISCV::GPRRegClass.contains(RegImm.Reg)) {
409         assert(isInt<12>(RegImm.Imm));
411             .addReg(RegImm.Reg)
412             .addImm(RegImm.Imm);
418         assert(RegImm.Imm == 0);
419         unsigned Opcode = RISCV::FPR32RegClass.contains(RegImm.Reg)
423             .addReg(RegImm.Reg)
424             .addReg(RegImm.Reg);
430       // TODO: Update all uses if RegImm.Imm == 0? Not just those that are
433         updateOperands(*UpdateMI, RegImm, NewReg);