Lines Matching defs:SEW
136 /// not a load or store which ignores SEW.
206 // What properties of SEW we need to preserve.
208 SEWEqual = 3, // The exact value of SEW needs to be preserved.
209 SEWGreaterThanOrEqual = 2, // SEW can be changed as long as it's greater
212 1, // SEW can be changed as long as it's greater
215 SEWNone = 0 // We don't need to preserve SEW at all.
216 } SEW = SEWNone;
228 return SEW || LMUL || SEWLMULRatio || TailPolicy || MaskPolicy;
238 SEW = SEWEqual;
262 SEW = std::max(SEW, B.SEW);
281 OS << "SEW=";
282 switch (SEW) {
336 switch (Used.SEW) {
388 // SEW, VL, or Policy operand even though it might not be the exact value in
415 // Loads and stores with implicit EEW do not demand SEW or LMUL directly.
417 // EMUL, but which allows us the flexibility to change SEW and LMUL
419 // Note: We assume that the instructions initial SEW is the EEW encoded
422 Res.SEW = DemandedFields::SEWNone;
437 Res.SEW = DemandedFields::SEWNone;
454 Res.SEW = DemandedFields::SEWGreaterThanOrEqualAndLessThan64;
456 Res.SEW = DemandedFields::SEWGreaterThanOrEqual;
461 // vmv.x.s, and vmv.f.s are unconditional and ignore everything except SEW.
475 // * We can't modify SEW here since the slide amount is in units of SEW.
500 Res.SEW = DemandedFields::SEWGreaterThanOrEqualAndLessThan64;
502 Res.SEW = DemandedFields::SEWGreaterThanOrEqual;
534 uint8_t SEW = 0;
610 unsigned getSEW() const { return SEW; }
672 SEW = RISCVVType::getSEW(VType);
680 SEW = S;
690 return RISCVVType::encodeVTYPE(VLMul, SEW, TailAgnostic, MaskAgnostic);
701 "Can't compare when only LMUL/SEW ratio is valid.");
702 return std::tie(VLMul, SEW, TailAgnostic, MaskAgnostic) ==
703 std::tie(Other.VLMul, Other.SEW, Other.TailAgnostic,
710 return RISCVVType::getSEWLMULRatio(SEW, VLMul);
806 // return an SEW/LMUL ratio only value.
840 << "SEW=" << (unsigned)SEW << ", "
939 // %vl = PseudoVSETVLI %avl:gpr, SEW=32, LMUL=M1
940 // $x0 = PseudoVSETVLI %vl:gpr, SEW=32, LMUL=M1
942 // %vl = PseudoVSETVLI %avl:gpr, SEW=32, LMUL=M1
943 // $x0 = PseudoVSETVLI %avl:gpr, SEW=32, LMUL=M1
986 static unsigned computeVLMAX(unsigned VLEN, unsigned SEW,
993 return VLEN/SEW;
1031 unsigned SEW = Log2SEW ? 1 << Log2SEW : 8;
1032 assert(RISCVVType::isValidSEW(SEW) && "Unexpected SEW");
1042 const unsigned VLMAX = computeVLMAX(ST->getRealMaxVLen(), SEW, VLMul);
1065 assert(SEW == EEW && "Initial SEW doesn't match expected EEW");
1068 InstrInfo.setVTYPE(VLMul, SEW, TailAgnostic, MaskAgnostic);
1081 // Use X0, X0 form if the AVL is the same and the SEW+LMUL gives the same
1189 // If we don't use LMUL or the SEW/LMUL ratio, then adjust LMUL so that we
1190 // maintain the SEW/LMUL ratio. This allows us to eliminate VL toggles in more
1243 ((Demanded.SEW || Demanded.SEWLMULRatio) ? IncomingInfo : Info).getSEW(),