Lines Matching defs:XOR
1203 ISD::OR, ISD::XOR},
1235 ISD::XOR, ISD::SDIV, ISD::SREM, ISD::UDIV,
1472 ISD::AND, ISD::OR, ISD::XOR, ISD::SETCC, ISD::SELECT});
6051 case ISD::XOR:
6995 case ISD::XOR:
7599 return DAG.getNode(ISD::XOR, DL, VT, Neg, FalseV);
7794 SDValue XOR = DAG.getNode(ISD::XOR, DL, XLenVT, CondV,
7796 return DAG.getNode(ISD::SINT_TO_FP, DL, VT, XOR);
9773 BaseOpc = ISD::XOR;
9788 // AND gives us (0 == 0) -> 1 and OR/XOR give us (0 != 0) -> 0. Therefore we
12492 DAG.getNode(ISD::XOR, DL, OType, ConditionRHS, ResultLowerThanLHS);
12592 SDValue NewRes = DAG.getNode(ISD::XOR, DL, MVT::i64, Src, SignFill);
12932 case ISD::XOR:
13063 case ISD::XOR:
13412 if (N0.getOpcode() != ISD::XOR || !isOneConstant(N0.getOperand(1)))
13477 } else if (N1.getOpcode() == ISD::XOR && isOneConstant(N1.getOperand(1)) &&
13556 if (N0.getOpcode() != ISD::XOR || N1.getOpcode() != ISD::XOR)
13592 return DAG.getNode(ISD::XOR, DL, VT, Logic, DAG.getConstant(1, DL, VT));
13748 if (TrueV.getOpcode() != ISD::XOR || FalseV.getOpcode() != ISD::XOR ||
13762 return DAG.getNode(ISD::XOR, DL, VT, NewOr, TrueV.getOperand(1));
15731 Xor.getOpcode() != ISD::XOR || !Xor.hasOneUse())
15812 if (LHS.getOpcode() == ISD::XOR && isNullConstant(RHS)) {
15884 case ISD::XOR:
16717 SDValue NewHi = DAG.getNode(ISD::XOR, DL, MVT::i32, Hi,
16782 return DAG.getNode(ISD::XOR, DL, VT, NewFMV,
16821 case ISD::XOR:
16897 if (Cond.getOpcode() == ISD::XOR && isOneConstant(Cond.getOperand(1))) {
17007 if (TrueV.getOpcode() == ISD::XOR && FalseV.getOpcode() == ISD::XOR &&
17013 return DAG.getNode(ISD::XOR, DL, VT, NewSel, TrueV.getOperand(1));
17717 if (Opcode != ISD::AND && Opcode != ISD::OR && Opcode != ISD::XOR)