Lines Matching defs:LocVT

18995                      MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo,
19007 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
19014 if (!LocVT.isVector() && IsRet && ValNo > 1)
19055 LocVT = XLenVT;
19058 LocVT = MVT::i64;
19103 CCValAssign::getMem(ValNo, ValVT, StackOffset, LocVT, LocInfo));
19106 LocVT = MVT::i32;
19107 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
19111 CCValAssign::getCustomReg(ValNo, ValVT, HiReg, LocVT, LocInfo));
19115 CCValAssign::getCustomMem(ValNo, ValVT, StackOffset, LocVT, LocInfo));
19123 LocVT = TLI.getContainerForFixedLengthVector(LocVT);
19129 LocVT = XLenVT;
19132 CCValAssign::getPending(ValNo, ValVT, LocVT, LocInfo));
19151 XLen, State, VA, AF, ValNo, ValVT, LocVT, ArgFlags,
19177 LocVT = XLenVT;
19180 LocVT = XLenVT;
19184 LocVT = ValVT;
19216 assert((!UseGPRForF16_F32 || !UseGPRForF64 || LocVT == XLenVT ||
19221 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
19229 LocVT = ValVT;
19232 State.addLoc(CCValAssign::getMem(ValNo, ValVT, StackOffset, LocVT, LocInfo));
19353 EVT LocVT = VA.getLocVT();
19355 const TargetRegisterClass *RC = TLI.getRegClassFor(LocVT.getSimpleVT());
19358 Val = DAG.getCopyFromReg(Chain, DL, VReg, LocVT);
19383 EVT LocVT = VA.getLocVT();
19389 if (VA.getValVT().isFixedLengthVector() && LocVT.isScalableVector())
19390 Val = convertToScalableVector(LocVT, Val, DAG, Subtarget);
19393 if (LocVT.isInteger() &&
19395 Val = DAG.getNode(RISCVISD::FMV_X_ANYEXTH, DL, LocVT, Val);
19396 } else if (LocVT == MVT::i64 && VA.getValVT() == MVT::f32) {
19404 Val = DAG.getNode(ISD::BITCAST, DL, LocVT, Val);
19417 EVT LocVT = VA.getLocVT();
19424 ValVT = LocVT;
19442 ExtType, DL, LocVT, Chain, FIN,
19482 unsigned ValNo, MVT ValVT, MVT LocVT,
19488 if (LocVT == MVT::i32 || LocVT == MVT::i64) {
19490 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
19497 if (LocVT == MVT::f16 &&
19505 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
19510 if (LocVT == MVT::f32 && Subtarget.hasStdExtF()) {
19517 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
19522 if (LocVT == MVT::f64 && Subtarget.hasStdExtD()) {
19529 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
19535 if ((LocVT == MVT::f16 &&
19537 (LocVT == MVT::f32 && Subtarget.hasStdExtZfinx()) ||
19538 (LocVT == MVT::f64 && Subtarget.is64Bit() &&
19541 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
19546 if (LocVT == MVT::f16) {
19548 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
19552 if (LocVT == MVT::i32 || LocVT == MVT::f32) {
19554 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset4, LocVT, LocInfo));
19558 if (LocVT == MVT::i64 || LocVT == MVT::f64) {
19560 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
19564 if (LocVT.isVector()) {
19570 LocVT = TLI.getContainerForFixedLengthVector(LocVT);
19572 CCValAssign::getReg(ValNo, ValVT, AllocatedVReg, LocVT, LocInfo));
19577 LocVT = TLI.getSubtarget().getXLenVT();
19578 State.addLoc(CCValAssign::getReg(ValNo, ValVT, GPRReg, LocVT, LocInfo));
19585 CCValAssign::getMem(ValNo, ValVT, StackOffset, LocVT, LocInfo));
19598 bool RISCV::CC_RISCV_GHC(unsigned ValNo, MVT ValVT, MVT LocVT,
19610 if (LocVT == MVT::i32 || LocVT == MVT::i64) {
19614 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
19622 if (LocVT == MVT::f32 && Subtarget.hasStdExtF()) {
19629 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
19634 if (LocVT == MVT::f64 && Subtarget.hasStdExtD()) {
19641 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
19646 if ((LocVT == MVT::f32 && Subtarget.hasStdExtZfinx()) ||
19647 (LocVT == MVT::f64 && Subtarget.hasStdExtZdinx() &&
19650 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));