Lines Matching defs:Ld
5130 auto *Ld = cast<LoadSDNode>(V);
5133 Ld->getBasePtr(), TypeSize::getFixed(Offset), DL);
5140 SDValue Ops[] = {Ld->getChain(),
5149 Ld->getMemOperand(), Offset, SVT.getStoreSize()));
5150 DAG.makeEquivalentMemoryOrdering(Ld, NewLoad);
5166 V = DAG.getLoad(SVT, DL, Ld->getChain(), NewAddr,
5167 Ld->getPointerInfo().getWithOffset(Offset),
5168 Ld->getOriginalAlign(),
5169 Ld->getMemOperand()->getFlags());
5171 V = DAG.getExtLoad(ISD::EXTLOAD, DL, XLenVT, Ld->getChain(), NewAddr,
5172 Ld->getPointerInfo().getWithOffset(Offset), SVT,
5173 Ld->getOriginalAlign(),
5174 Ld->getMemOperand()->getFlags());
5175 DAG.makeEquivalentMemoryOrdering(Ld, V);
12326 LoadSDNode *Ld = cast<LoadSDNode>(N);
12329 SDValue Res = DAG.getExtLoad(ISD::SEXTLOAD, dl, MVT::i64, Ld->getChain(),
12330 Ld->getBasePtr(), Ld->getMemoryVT(),
12331 Ld->getMemOperand());
16187 auto *Ld = dyn_cast<LoadSDNode>(Op);
16188 if (!Ld || !Ld->isSimple() || !Op.hasOneUse() ||
16189 Ld->getChain() != BaseLd->getChain() || !ISD::isNormalLoad(Ld) ||
16190 Ld->getValueType(0) != BaseLdVT)
16193 Lds.push_back(Ld);
16196 Align = std::min(Align, Ld->getAlign());
16280 for (SDValue Ld : N->ops())
16281 DAG.makeEquivalentMemoryOrdering(cast<LoadSDNode>(Ld), StridedLoad);
18055 RISCVTargetLowering::getTargetConstantFromLoad(LoadSDNode *Ld) const {
18056 assert(Ld && "Unexpected null LoadSDNode");
18057 if (!ISD::isNormalLoad(Ld))
18060 SDValue Ptr = Ld->getBasePtr();