Lines Matching defs:VL
67 SDValue VL = CurDAG->getRegister(RISCV::X0, Subtarget->getXLenVT());
72 Result = CurDAG->getNode(Opc, DL, VT, CurDAG->getUNDEF(VT), Src, VL);
84 SDValue VL = N->getOperand(3);
115 VL};
315 SDValue VL;
316 selectVLOp(Node->getOperand(CurOp++), VL);
317 Operands.push_back(VL);
381 unsigned NF = Node->getNumValues() - 2; // Do not count VL and Chain.
416 ReplaceUses(SDValue(Node, NF), SDValue(Load, 1)); // VL
1640 SDValue VL;
1641 selectVLOp(Node->getOperand(3), VL);
1645 ReplaceNode(Node, CurDAG->getMachineNode(VMSetOpcode, DL, VT, VL, SEW));
1652 CurDAG->getMachineNode(VMSLTOpcode, DL, VT, {Src1, Src2, VL, SEW}),
1655 {Cmp, Cmp, VL, SEW}));
1720 SDValue VL;
1721 selectVLOp(Node->getOperand(5), VL);
1735 {Mask, MaskedOff, VL, MaskSEW}));
1744 CurDAG->getMachineNode(VMSLTOpcode, DL, VT, {Src1, Src2, VL, SEW}),
1747 {Mask, Cmp, VL, MaskSEW}));
1764 {MaskedOff, Src1, Src2, V0, VL, SEW, Glue}),
1768 {Cmp, Mask, VL, MaskSEW}));
2303 SDValue VL;
2305 // We could deal with more VL if we update the VSETVLI insert pass to
2309 selectVLOp(Node->getOperand(2), VL);
2311 selectVLOp(Node->getOperand(2), VL);
2316 // If VL=1, then we don't need to do a strided load and can just do a
2318 bool IsStrided = !isOneConstant(VL);
2331 Operands.append({VL, SEW, PolicyOp, Ld->getChain()});
3280 // Select VL as a 5 bit immediate or a value that will become a register. This
3282 bool RISCVDAGToDAGISel::selectVLOp(SDValue N, SDValue &VL) {
3285 VL = CurDAG->getTargetConstant(C->getZExtValue(), SDLoc(N),
3289 VL = CurDAG->getTargetConstant(RISCV::VLMaxSentinel, SDLoc(N),
3293 // All our VL operands use an operand that allows GPRNoX0 or an immediate
3297 VL = CurDAG->getTargetConstant(RISCV::VLMaxSentinel, SDLoc(N),
3300 VL = N;
3391 // There's no passthru on these _VL nodes so any VL/mask is ok, since any
3572 // assume that it's all-ones? Same applies to its VL.
3697 // The resulting VL is the minimum of the two VLs.
3702 SDValue Merge, False, True, VL, Mask, Glue;
3708 VL = N->getOperand(2);
3717 VL = N->getOperand(4);
3802 LoopWorklist.push_back(VL.getNode());
3832 SDValue OrigVL = VL;
3833 VL = GetMinVL(TrueVL, VL);
3834 if (!VL)
3839 // for these if we change the active elements (i.e. mask or VL).
3843 if (TrueVL != VL)
3847 // If we end up changing the VL or mask of True, then we need to make sure it
3850 if (TrueVL != VL || !IsMasked)
3873 SDValue(CurDAG->getMachineNode(VMSetOpc, DL, MaskVT, VL, SEW), 0);
3893 // However, if the VL became smaller than what the vmerge had originally, then
3894 // elements past VL that were previously in the vmerge's body will have moved
3897 bool MergeVLShrunk = VL != OrigVL;
3922 Ops.append({VL, SEW, PolicyOp});
3941 // Replace another value of True. E.g. chain and VL.