Lines Matching defs:TII
745 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
767 BuildMI(MBB, II, dl, TII.get(PPC::STDUX), PPC::X1)
771 BuildMI(MBB, II, dl, TII.get(PPC::ADDI8), MI.getOperand(0).getReg())
775 BuildMI(MBB, II, dl, TII.get(PPC::STWUX), PPC::R1)
779 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), MI.getOperand(0).getReg())
805 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
828 BuildMI(MBB, II, dl, TII.get(PPC::ADDI8), FramePointer)
832 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), FramePointer)
836 BuildMI(MBB, II, dl, TII.get(PPC::LD), FramePointer)
840 BuildMI(MBB, II, dl, TII.get(PPC::LWZ), FramePointer)
852 BuildMI(MBB, II, dl, TII.get(PPC::LI8), NegSizeReg)
857 BuildMI(MBB, II, dl, TII.get(PPC::AND8), NegSizeReg)
869 BuildMI(MBB, II, dl, TII.get(PPC::LI), NegSizeReg)
874 BuildMI(MBB, II, dl, TII.get(PPC::AND), NegSizeReg)
891 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
899 const MCInstrDesc &CopyInst = TII.get(LP64 ? PPC::OR8 : PPC::OR);
935 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
940 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::LI8 : PPC::LI),
962 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
974 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg)
984 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg)
991 addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::STW8 : PPC::STW))
1007 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1019 addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::LWZ8 : PPC::LWZ),
1030 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg)
1035 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MTOCRF8 : PPC::MTOCRF), DestReg)
1050 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1092 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::LI8 : PPC::LI), Reg)
1097 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::LIS8 : PPC::LIS), Reg)
1107 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::SETNBC8 : PPC::SETNBC), Reg)
1121 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::SETB8 : PPC::SETB), Reg)
1132 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg)
1143 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg)
1148 addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::STW8 : PPC::STW))
1156 Ins->setDesc(TII.get(PPC::UNENCODED_NOP));
1169 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1181 addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::LWZ8 : PPC::LWZ),
1184 BuildMI(MBB, II, dl, TII.get(TargetOpcode::IMPLICIT_DEF), DestReg);
1187 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), RegO)
1192 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWIMI8 : PPC::RLWIMI), RegO)
1199 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MTOCRF8 : PPC::MTOCRF),
1240 const TargetInstrInfo &TII, Register SrcReg,
1255 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXV))
1259 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXV))
1264 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXV))
1268 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXV))
1285 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1290 spillRegPairs(MBB, II, DL, TII, SrcReg, FrameIndex, IsLittleEndian, IsKilled,
1319 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1336 BuildMI(MBB, II, DL, TII.get(PPC::XXMFACC), SrcReg).addReg(SrcReg);
1338 spillRegPairs(MBB, II, DL, TII, Reg, FrameIndex, IsLittleEndian, IsKilled,
1341 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXVP))
1344 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXVP))
1349 BuildMI(MBB, II, DL, TII.get(PPC::XXMTACC), SrcReg).addReg(SrcReg);
1362 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1378 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::LXVP), Reg),
1380 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::LXVP), Reg + 1),
1383 BuildMI(MBB, II, DL, TII.get(PPC::XXMTACC), DestReg).addReg(DestReg);
1397 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1408 BuildMI(MBB, II, DL, TII.get(PPC::DMXXEXTFDMR512), VSRpReg0)
1412 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXVP))
1415 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXVP))
1431 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1442 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::LXVP), VSRpReg0),
1444 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::LXVP), VSRpReg1),
1448 BuildMI(MBB, II, DL, TII.get(PPC::DMXXINSTFDMR512), DestReg)
1463 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1472 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STD))
1475 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STD))
1490 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1500 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::LD), Reg), FrameIndex,
1502 addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::LD), Reg + 1), FrameIndex,
1593 const PPCInstrInfo &TII = *Subtarget.getInstrInfo();
1700 MI.setDesc(TII.get(NewOpc));
1717 if (TII.isPrefixed(MI.getOpcode()))
1748 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::MTVSRD : PPC::MTVSRWZ), VSReg)
1757 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::LI8 : PPC::LI), SReg)
1760 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::LIS8 : PPC::LIS), SRegHi)
1762 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::ORI8 : PPC::ORI), SReg)
1767 TII.materializeImmPostRA(MBB, II, dl, SReg, Offset);
1783 MI.setDesc(TII.get(NewOpcode));
1796 BuildMI(MBB, ++II, dl, TII.get(is64Bit ? PPC::MFVSRD : PPC::MFVSRWZ), SReg)
1805 BuildMI(MBB, II, dl, TII.get(PPC::ADD8), NewReg)
1808 MI.setDesc(TII.get(NewOpcode == PPC::LQX_PSEUDO ? PPC::LQ : PPC::STQ));
1911 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1912 const MCInstrDesc &MCID = TII.get(ADDriOpc);
1916 MRI.constrainRegClass(BaseReg, TII.getRegClass(MCID, 0, this, MF));
1941 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1945 TII.getRegClass(MCID, FIOperandNum, this, MF));