Lines Matching defs:Swap

2282                           unsigned &InsertAtByte, bool &Swap, bool IsLE) {
2301 Swap = M0 < 4;
2309 Swap = M1 < 4;
2317 Swap = M2 < 4;
2325 Swap = M3 < 4;
2333 Swap = true;
2357 bool &Swap, bool IsLE) {
2377 Swap = false;
2390 Swap = false;
2396 Swap = true;
2405 Swap = false;
2410 Swap = true;
2447 /// Can node \p N be lowered to an XXPERMDI instruction? If so, set \p Swap
2450 /// Specifically, set \p Swap to true only if \p N can be lowered to XXPERMDI
2456 bool &Swap, bool IsLE) {
2472 Swap = false;
2480 Swap = false;
2484 Swap = true;
2488 // Note: if control flow comes here that means Swap is already set above
2493 Swap = false;
2497 Swap = true;
2501 // Note: if control flow comes here that means Swap is already set above
3086 bool Swap = false;
3089 Swap = true;
3093 Swap = true;
3096 if (Swap)
9836 bool Swap = false;
9894 Swap = false;
9899 Swap = CurrentElement < BytesInVector;
9912 if (Swap)
9942 bool Swap = false;
9987 Swap = false;
10006 Swap = MaskOneElt < NumHalfWords;
10018 if (Swap)
10168 bool Swap = false;
10233 PPC::isXXINSERTWMask(SVOp, ShiftElts, InsertAtByte, Swap,
10237 else if (Swap)
10269 PPC::isXXSLDWIShuffleMask(SVOp, ShiftElts, Swap, isLittleEndian)) {
10270 if (Swap)
10282 PPC::isXXPERMDIShuffleMask(SVOp, ShiftElts, Swap, isLittleEndian)) {
10283 if (Swap)
10327 SDValue Swap = DAG.getNode(PPCISD::SWAP_NO_CHAIN, dl, MVT::v2f64, Conv);
10328 return DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, Swap);
10490 Swap V1 and V2:
13999 bool Swap, SDLoc &DL, SelectionDAG &DAG) {
14009 // Swap if needed. Depends on the condition code.
14010 if (Swap)
15274 SDValue Swap = DAG.getNode(
15276 DCI.AddToWorklist(Swap.getNode());
15280 SDValue N = DAG.getNode(ISD::BITCAST, dl, VecTy, Swap);
15284 N, Swap.getValue(1));
15287 return Swap;
15342 SDValue Swap = DAG.getNode(PPCISD::XXSWAPD, dl,
15344 DCI.AddToWorklist(Swap.getNode());
15345 Chain = Swap.getValue(1);
15346 SDValue StoreOps[] = { Chain, Swap, Base };